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https://github.com/edk2-porting/linux-next.git
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dec0ed6c1b
The NX CGM implementation doesn't support zero length messages and the current implementation has two flaws: - When the input data length is zero, it ignores the associated data. - Even when both lengths are zero, it uses the Crypto API to encrypt a zeroed block using ctr(aes) and because of this it allocates a new transformation and sets the key for this new tfm. Both operations are intended to be used only in user context, while the cryptographic operations can be called in both user and softirq contexts. This patch replaces the nested Crypto API use and adds two special cases: - When input data and associated data lengths are zero: it uses NX ECB mode to emulate the encryption of a zeroed block using ctr(aes). - When input data is zero and associated data is available: it uses NX GMAC mode to calculate the associated data MAC. Reviewed-by: Joy Latten <jmlatten@linux.vnet.ibm.com> Signed-off-by: Marcelo Cerri <mhcerri@linux.vnet.ibm.com> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
518 lines
14 KiB
C
518 lines
14 KiB
C
/**
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* AES GCM routines supporting the Power 7+ Nest Accelerators driver
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*
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* Copyright (C) 2012 International Business Machines Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; version 2 only.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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*
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* Author: Kent Yoder <yoder1@us.ibm.com>
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*/
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#include <crypto/internal/aead.h>
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#include <crypto/aes.h>
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#include <crypto/algapi.h>
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#include <crypto/scatterwalk.h>
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/crypto.h>
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#include <asm/vio.h>
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#include "nx_csbcpb.h"
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#include "nx.h"
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static int gcm_aes_nx_set_key(struct crypto_aead *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&tfm->base);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
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nx_ctx_init(nx_ctx, HCOP_FC_AES);
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switch (key_len) {
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case AES_KEYSIZE_128:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_128);
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NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_128);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_128];
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break;
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case AES_KEYSIZE_192:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_192);
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NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_192);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_192];
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break;
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case AES_KEYSIZE_256:
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NX_CPB_SET_KEY_SIZE(csbcpb, NX_KS_AES_256);
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NX_CPB_SET_KEY_SIZE(csbcpb_aead, NX_KS_AES_256);
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nx_ctx->ap = &nx_ctx->props[NX_PROPS_AES_256];
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break;
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default:
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return -EINVAL;
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}
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csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
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memcpy(csbcpb->cpb.aes_gcm.key, in_key, key_len);
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csbcpb_aead->cpb.hdr.mode = NX_MODE_AES_GCA;
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memcpy(csbcpb_aead->cpb.aes_gca.key, in_key, key_len);
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return 0;
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}
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static int gcm4106_aes_nx_set_key(struct crypto_aead *tfm,
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const u8 *in_key,
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unsigned int key_len)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(&tfm->base);
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char *nonce = nx_ctx->priv.gcm.nonce;
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int rc;
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if (key_len < 4)
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return -EINVAL;
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key_len -= 4;
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rc = gcm_aes_nx_set_key(tfm, in_key, key_len);
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if (rc)
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goto out;
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memcpy(nonce, in_key + key_len, 4);
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out:
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return rc;
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}
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static int gcm_aes_nx_setauthsize(struct crypto_aead *tfm,
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unsigned int authsize)
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{
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if (authsize > crypto_aead_alg(tfm)->maxauthsize)
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return -EINVAL;
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crypto_aead_crt(tfm)->authsize = authsize;
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return 0;
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}
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static int gcm4106_aes_nx_setauthsize(struct crypto_aead *tfm,
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unsigned int authsize)
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{
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switch (authsize) {
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case 8:
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case 12:
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case 16:
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break;
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default:
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return -EINVAL;
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}
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crypto_aead_crt(tfm)->authsize = authsize;
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return 0;
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}
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static int nx_gca(struct nx_crypto_ctx *nx_ctx,
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struct aead_request *req,
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u8 *out)
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{
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int rc;
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struct nx_csbcpb *csbcpb_aead = nx_ctx->csbcpb_aead;
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struct scatter_walk walk;
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struct nx_sg *nx_sg = nx_ctx->in_sg;
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unsigned int nbytes = req->assoclen;
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unsigned int processed = 0, to_process;
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u32 max_sg_len;
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if (nbytes <= AES_BLOCK_SIZE) {
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scatterwalk_start(&walk, req->assoc);
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scatterwalk_copychunks(out, &walk, nbytes, SCATTERWALK_FROM_SG);
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scatterwalk_done(&walk, SCATTERWALK_FROM_SG, 0);
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return 0;
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}
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NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_CONTINUATION;
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/* page_limit: number of sg entries that fit on one page */
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max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
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nx_ctx->ap->sglen);
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do {
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/*
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* to_process: the data chunk to process in this update.
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* This value is bound by sg list limits.
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*/
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to_process = min_t(u64, nbytes - processed,
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nx_ctx->ap->databytelen);
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to_process = min_t(u64, to_process,
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NX_PAGE_SIZE * (max_sg_len - 1));
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if ((to_process + processed) < nbytes)
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NX_CPB_FDM(csbcpb_aead) |= NX_FDM_INTERMEDIATE;
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else
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NX_CPB_FDM(csbcpb_aead) &= ~NX_FDM_INTERMEDIATE;
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nx_sg = nx_walk_and_build(nx_ctx->in_sg, nx_ctx->ap->sglen,
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req->assoc, processed, to_process);
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nx_ctx->op_aead.inlen = (nx_ctx->in_sg - nx_sg)
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* sizeof(struct nx_sg);
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op_aead,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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return rc;
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memcpy(csbcpb_aead->cpb.aes_gca.in_pat,
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csbcpb_aead->cpb.aes_gca.out_pat,
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AES_BLOCK_SIZE);
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NX_CPB_FDM(csbcpb_aead) |= NX_FDM_CONTINUATION;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(req->assoclen, &(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < nbytes);
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memcpy(out, csbcpb_aead->cpb.aes_gca.out_pat, AES_BLOCK_SIZE);
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return rc;
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}
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static int gmac(struct aead_request *req, struct blkcipher_desc *desc)
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{
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int rc;
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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struct nx_sg *nx_sg;
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unsigned int nbytes = req->assoclen;
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unsigned int processed = 0, to_process;
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u32 max_sg_len;
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/* Set GMAC mode */
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csbcpb->cpb.hdr.mode = NX_MODE_AES_GMAC;
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;
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/* page_limit: number of sg entries that fit on one page */
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max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
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nx_ctx->ap->sglen);
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/* Copy IV */
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memcpy(csbcpb->cpb.aes_gcm.iv_or_cnt, desc->info, AES_BLOCK_SIZE);
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do {
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/*
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* to_process: the data chunk to process in this update.
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* This value is bound by sg list limits.
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*/
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to_process = min_t(u64, nbytes - processed,
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nx_ctx->ap->databytelen);
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to_process = min_t(u64, to_process,
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NX_PAGE_SIZE * (max_sg_len - 1));
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if ((to_process + processed) < nbytes)
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NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
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else
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
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nx_sg = nx_walk_and_build(nx_ctx->in_sg, nx_ctx->ap->sglen,
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req->assoc, processed, to_process);
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nx_ctx->op.inlen = (nx_ctx->in_sg - nx_sg)
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* sizeof(struct nx_sg);
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csbcpb->cpb.aes_gcm.bit_length_data = 0;
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csbcpb->cpb.aes_gcm.bit_length_aad = 8 * nbytes;
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
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csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_gcm.in_s0,
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csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);
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NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(req->assoclen, &(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < nbytes);
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out:
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/* Restore GCM mode */
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csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
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return rc;
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}
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static int gcm_empty(struct aead_request *req, struct blkcipher_desc *desc,
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int enc)
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{
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int rc;
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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char out[AES_BLOCK_SIZE];
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struct nx_sg *in_sg, *out_sg;
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/* For scenarios where the input message is zero length, AES CTR mode
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* may be used. Set the source data to be a single block (16B) of all
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* zeros, and set the input IV value to be the same as the GMAC IV
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* value. - nx_wb 4.8.1.3 */
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/* Change to ECB mode */
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csbcpb->cpb.hdr.mode = NX_MODE_AES_ECB;
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memcpy(csbcpb->cpb.aes_ecb.key, csbcpb->cpb.aes_gcm.key,
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sizeof(csbcpb->cpb.aes_ecb.key));
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if (enc)
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NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
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else
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
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/* Encrypt the counter/IV */
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in_sg = nx_build_sg_list(nx_ctx->in_sg, (u8 *) desc->info,
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AES_BLOCK_SIZE, nx_ctx->ap->sglen);
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out_sg = nx_build_sg_list(nx_ctx->out_sg, (u8 *) out, sizeof(out),
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nx_ctx->ap->sglen);
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nx_ctx->op.inlen = (nx_ctx->in_sg - in_sg) * sizeof(struct nx_sg);
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nx_ctx->op.outlen = (nx_ctx->out_sg - out_sg) * sizeof(struct nx_sg);
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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desc->flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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/* Copy out the auth tag */
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memcpy(csbcpb->cpb.aes_gcm.out_pat_or_mac, out,
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crypto_aead_authsize(crypto_aead_reqtfm(req)));
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out:
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/* Restore XCBC mode */
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csbcpb->cpb.hdr.mode = NX_MODE_AES_GCM;
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/*
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* ECB key uses the same region that GCM AAD and counter, so it's safe
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* to just fill it with zeroes.
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*/
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memset(csbcpb->cpb.aes_ecb.key, 0, sizeof(csbcpb->cpb.aes_ecb.key));
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return rc;
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}
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static int gcm_aes_nx_crypt(struct aead_request *req, int enc)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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struct nx_csbcpb *csbcpb = nx_ctx->csbcpb;
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struct blkcipher_desc desc;
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unsigned int nbytes = req->cryptlen;
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unsigned int processed = 0, to_process;
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unsigned long irq_flags;
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u32 max_sg_len;
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int rc = -EINVAL;
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spin_lock_irqsave(&nx_ctx->lock, irq_flags);
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desc.info = nx_ctx->priv.gcm.iv;
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/* initialize the counter */
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*(u32 *)(desc.info + NX_GCM_CTR_OFFSET) = 1;
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if (nbytes == 0) {
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if (req->assoclen == 0)
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rc = gcm_empty(req, &desc, enc);
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else
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rc = gmac(req, &desc);
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if (rc)
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goto out;
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else
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goto mac;
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}
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/* Process associated data */
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csbcpb->cpb.aes_gcm.bit_length_aad = req->assoclen * 8;
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if (req->assoclen) {
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rc = nx_gca(nx_ctx, req, csbcpb->cpb.aes_gcm.in_pat_or_aad);
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if (rc)
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goto out;
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}
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/* Set flags for encryption */
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_CONTINUATION;
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if (enc) {
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NX_CPB_FDM(csbcpb) |= NX_FDM_ENDE_ENCRYPT;
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} else {
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_ENDE_ENCRYPT;
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nbytes -= crypto_aead_authsize(crypto_aead_reqtfm(req));
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}
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/* page_limit: number of sg entries that fit on one page */
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max_sg_len = min_t(u32, nx_driver.of.max_sg_len/sizeof(struct nx_sg),
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nx_ctx->ap->sglen);
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do {
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/*
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* to_process: the data chunk to process in this update.
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* This value is bound by sg list limits.
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*/
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to_process = min_t(u64, nbytes - processed,
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nx_ctx->ap->databytelen);
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to_process = min_t(u64, to_process,
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NX_PAGE_SIZE * (max_sg_len - 1));
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if ((to_process + processed) < nbytes)
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NX_CPB_FDM(csbcpb) |= NX_FDM_INTERMEDIATE;
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else
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NX_CPB_FDM(csbcpb) &= ~NX_FDM_INTERMEDIATE;
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csbcpb->cpb.aes_gcm.bit_length_data = nbytes * 8;
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desc.tfm = (struct crypto_blkcipher *) req->base.tfm;
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rc = nx_build_sg_lists(nx_ctx, &desc, req->dst,
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req->src, to_process, processed,
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csbcpb->cpb.aes_gcm.iv_or_cnt);
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if (rc)
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goto out;
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rc = nx_hcall_sync(nx_ctx, &nx_ctx->op,
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req->base.flags & CRYPTO_TFM_REQ_MAY_SLEEP);
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if (rc)
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goto out;
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memcpy(desc.info, csbcpb->cpb.aes_gcm.out_cnt, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_gcm.in_pat_or_aad,
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csbcpb->cpb.aes_gcm.out_pat_or_mac, AES_BLOCK_SIZE);
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memcpy(csbcpb->cpb.aes_gcm.in_s0,
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csbcpb->cpb.aes_gcm.out_s0, AES_BLOCK_SIZE);
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NX_CPB_FDM(csbcpb) |= NX_FDM_CONTINUATION;
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atomic_inc(&(nx_ctx->stats->aes_ops));
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atomic64_add(csbcpb->csb.processed_byte_count,
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&(nx_ctx->stats->aes_bytes));
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processed += to_process;
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} while (processed < nbytes);
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mac:
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if (enc) {
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/* copy out the auth tag */
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scatterwalk_map_and_copy(csbcpb->cpb.aes_gcm.out_pat_or_mac,
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req->dst, nbytes,
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crypto_aead_authsize(crypto_aead_reqtfm(req)),
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SCATTERWALK_TO_SG);
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} else {
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u8 *itag = nx_ctx->priv.gcm.iauth_tag;
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u8 *otag = csbcpb->cpb.aes_gcm.out_pat_or_mac;
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scatterwalk_map_and_copy(itag, req->src, nbytes,
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crypto_aead_authsize(crypto_aead_reqtfm(req)),
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SCATTERWALK_FROM_SG);
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rc = memcmp(itag, otag,
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crypto_aead_authsize(crypto_aead_reqtfm(req))) ?
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-EBADMSG : 0;
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}
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out:
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spin_unlock_irqrestore(&nx_ctx->lock, irq_flags);
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return rc;
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}
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static int gcm_aes_nx_encrypt(struct aead_request *req)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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char *iv = nx_ctx->priv.gcm.iv;
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memcpy(iv, req->iv, 12);
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return gcm_aes_nx_crypt(req, 1);
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}
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static int gcm_aes_nx_decrypt(struct aead_request *req)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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char *iv = nx_ctx->priv.gcm.iv;
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memcpy(iv, req->iv, 12);
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return gcm_aes_nx_crypt(req, 0);
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}
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static int gcm4106_aes_nx_encrypt(struct aead_request *req)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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char *iv = nx_ctx->priv.gcm.iv;
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char *nonce = nx_ctx->priv.gcm.nonce;
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memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
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memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);
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return gcm_aes_nx_crypt(req, 1);
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}
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static int gcm4106_aes_nx_decrypt(struct aead_request *req)
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{
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struct nx_crypto_ctx *nx_ctx = crypto_tfm_ctx(req->base.tfm);
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char *iv = nx_ctx->priv.gcm.iv;
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char *nonce = nx_ctx->priv.gcm.nonce;
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memcpy(iv, nonce, NX_GCM4106_NONCE_LEN);
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memcpy(iv + NX_GCM4106_NONCE_LEN, req->iv, 8);
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return gcm_aes_nx_crypt(req, 0);
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}
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/* tell the block cipher walk routines that this is a stream cipher by
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* setting cra_blocksize to 1. Even using blkcipher_walk_virt_block
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* during encrypt/decrypt doesn't solve this problem, because it calls
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* blkcipher_walk_done under the covers, which doesn't use walk->blocksize,
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* but instead uses this tfm->blocksize. */
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struct crypto_alg nx_gcm_aes_alg = {
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.cra_name = "gcm(aes)",
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.cra_driver_name = "gcm-aes-nx",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct nx_crypto_ctx),
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.cra_type = &crypto_aead_type,
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.cra_module = THIS_MODULE,
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.cra_init = nx_crypto_ctx_aes_gcm_init,
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.cra_exit = nx_crypto_ctx_exit,
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.cra_aead = {
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.ivsize = AES_BLOCK_SIZE,
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.maxauthsize = AES_BLOCK_SIZE,
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.setkey = gcm_aes_nx_set_key,
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.setauthsize = gcm_aes_nx_setauthsize,
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.encrypt = gcm_aes_nx_encrypt,
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.decrypt = gcm_aes_nx_decrypt,
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}
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};
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struct crypto_alg nx_gcm4106_aes_alg = {
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.cra_name = "rfc4106(gcm(aes))",
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.cra_driver_name = "rfc4106-gcm-aes-nx",
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.cra_priority = 300,
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.cra_flags = CRYPTO_ALG_TYPE_AEAD,
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.cra_blocksize = 1,
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.cra_ctxsize = sizeof(struct nx_crypto_ctx),
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.cra_type = &crypto_nivaead_type,
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.cra_module = THIS_MODULE,
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.cra_init = nx_crypto_ctx_aes_gcm_init,
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.cra_exit = nx_crypto_ctx_exit,
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.cra_aead = {
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.ivsize = 8,
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.maxauthsize = AES_BLOCK_SIZE,
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.geniv = "seqiv",
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.setkey = gcm4106_aes_nx_set_key,
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.setauthsize = gcm4106_aes_nx_setauthsize,
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.encrypt = gcm4106_aes_nx_encrypt,
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.decrypt = gcm4106_aes_nx_decrypt,
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}
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};
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