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dcfb81d61d
OMAP-L137/AM17x has limited number of dedicated EMIFA address pins, enough to interface directly to an SDRAM. If a device such as an asynchronous flash needs to be attached to the EMIFA, then either GPIO pins or a chip select may be used to control the flash device's upper address lines. This patch adds support for the NOR flash on the OMAP-L137/ AM17x user interface daughter board using the latch-addr-flash MTD mapping driver which allows flashes to be partially physically addressed. The upper address lines are set by a board specific code which is a separate patch. Signed-off-by: David Griego <dgriego@mvista.com> Signed-off-by: Aleksey Makarov <amakarov@ru.mvista.com> Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Savinay Dharmappa <savinay.dharmappa@ti.com> Signed-off-by: Artem Bityutskiy <Artem.Bityutskiy@nokia.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
30 lines
716 B
C
30 lines
716 B
C
/*
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* Interface for NOR flash driver whose high address lines are latched
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*
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* Copyright © 2008 MontaVista Software, Inc. <source@mvista.com>
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*
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* This file is licensed under the terms of the GNU General Public License
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* version 2. This program is licensed "as is" without any warranty of any
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* kind, whether express or implied.
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*/
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#ifndef __LATCH_ADDR_FLASH__
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#define __LATCH_ADDR_FLASH__
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struct map_info;
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struct mtd_partition;
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struct latch_addr_flash_data {
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unsigned int width;
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unsigned int size;
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int (*init)(void *data, int cs);
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void (*done)(void *data);
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void (*set_window)(unsigned long offset, void *data);
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void *data;
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unsigned int nr_parts;
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struct mtd_partition *parts;
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};
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#endif
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