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1727339590
The CLOCKSOURCE_OF_DECLARE macro is used widely for the timers to declare the clocksource at early stage. However, this macro is also used to initialize the clockevent if any, or the clockevent only. It was originally suggested to declare another macro to initialize a clockevent, so in order to separate the two entities even they belong to the same IP. This was not accepted because of the impact on the DT where splitting a clocksource/clockevent definition does not make sense as it is a Linux concept not a hardware description. On the other side, the clocksource has not interrupt declared while the clockevent has, so it is easy from the driver to know if the description is for a clockevent or a clocksource, IOW it could be implemented at the driver level. So instead of dealing with a named clocksource macro, let's use a more generic one: TIMER_OF_DECLARE. The patch has not functional changes. Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
87 lines
1.8 KiB
C
87 lines
1.8 KiB
C
/*
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* Copyright (C) Maxime Coquelin 2015
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* Author: Maxime Coquelin <mcoquelin.stm32@gmail.com>
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* License terms: GNU General Public License (GPL), version 2
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*/
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#include <linux/kernel.h>
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#include <linux/clocksource.h>
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#include <linux/clockchips.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/clk.h>
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#include <linux/bitops.h>
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#define SYST_CSR 0x00
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#define SYST_RVR 0x04
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#define SYST_CVR 0x08
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#define SYST_CALIB 0x0c
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#define SYST_CSR_ENABLE BIT(0)
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#define SYSTICK_LOAD_RELOAD_MASK 0x00FFFFFF
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static int __init system_timer_of_register(struct device_node *np)
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{
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struct clk *clk = NULL;
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void __iomem *base;
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u32 rate;
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int ret;
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base = of_iomap(np, 0);
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if (!base) {
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pr_warn("system-timer: invalid base address\n");
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return -ENXIO;
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}
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ret = of_property_read_u32(np, "clock-frequency", &rate);
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if (ret) {
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clk = of_clk_get(np, 0);
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if (IS_ERR(clk)) {
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ret = PTR_ERR(clk);
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goto out_unmap;
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}
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ret = clk_prepare_enable(clk);
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if (ret)
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goto out_clk_put;
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rate = clk_get_rate(clk);
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if (!rate) {
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ret = -EINVAL;
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goto out_clk_disable;
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}
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}
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writel_relaxed(SYSTICK_LOAD_RELOAD_MASK, base + SYST_RVR);
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writel_relaxed(SYST_CSR_ENABLE, base + SYST_CSR);
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ret = clocksource_mmio_init(base + SYST_CVR, "arm_system_timer", rate,
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200, 24, clocksource_mmio_readl_down);
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if (ret) {
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pr_err("failed to init clocksource (%d)\n", ret);
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if (clk)
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goto out_clk_disable;
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else
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goto out_unmap;
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}
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pr_info("ARM System timer initialized as clocksource\n");
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return 0;
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out_clk_disable:
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clk_disable_unprepare(clk);
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out_clk_put:
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clk_put(clk);
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out_unmap:
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iounmap(base);
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pr_warn("ARM System timer register failed (%d)\n", ret);
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return ret;
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}
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TIMER_OF_DECLARE(arm_systick, "arm,armv7m-systick",
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system_timer_of_register);
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