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9548b209a3
This fixes some of the alpha-specific build problems, except a) modpost
warning about COMMON symbol "saved_config" and b) nasty final link
failure with gcc-4.x, -Os and scsi-disk driver configured built-in
(due to jump table in .rodata referencing discarded .exit.text).
- build failure with gcc-4.2.x: fix up casts in cia_io* routines to avoid
warnings ('discards qualifiers from pointer target type'), which are
failures, thanks to -Werror;
- modpost warnings: add missing __init qualifier for titan and marvel;
for non-generic build, move machine vectors from .data to .data.init.refok
section;
- unbreak CPU-specific optimization: rearrange cpuflags-y assignments
so that extended -mcpu value (ev56, pca56, ev67) overrides basic
one (ev5, ev6) and not vice versa.
Signed-off-by: Ivan Kokshaysky <ink@jurassic.park.msu.ru>
Cc: Richard Henderson <rth@twiddle.net>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
150 lines
4.9 KiB
C
150 lines
4.9 KiB
C
/*
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* linux/arch/alpha/kernel/machvec_impl.h
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*
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* Copyright (C) 1997, 1998 Richard Henderson
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*
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* This file has goodies to help simplify instantiation of machine vectors.
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*/
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#include <asm/pgalloc.h>
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/* Whee. These systems don't have an HAE:
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IRONGATE, MARVEL, POLARIS, TSUNAMI, TITAN, WILDFIRE
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Fix things up for the GENERIC kernel by defining the HAE address
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to be that of the cache. Now we can read and write it as we like. ;-) */
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#define IRONGATE_HAE_ADDRESS (&alpha_mv.hae_cache)
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#define MARVEL_HAE_ADDRESS (&alpha_mv.hae_cache)
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#define POLARIS_HAE_ADDRESS (&alpha_mv.hae_cache)
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#define TSUNAMI_HAE_ADDRESS (&alpha_mv.hae_cache)
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#define TITAN_HAE_ADDRESS (&alpha_mv.hae_cache)
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#define WILDFIRE_HAE_ADDRESS (&alpha_mv.hae_cache)
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#ifdef CIA_ONE_HAE_WINDOW
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#define CIA_HAE_ADDRESS (&alpha_mv.hae_cache)
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#endif
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#ifdef MCPCIA_ONE_HAE_WINDOW
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#define MCPCIA_HAE_ADDRESS (&alpha_mv.hae_cache)
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#endif
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/* Only a few systems don't define IACK_SC, handling all interrupts through
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the SRM console. But splitting out that one case from IO() below
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seems like such a pain. Define this to get things to compile. */
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#define JENSEN_IACK_SC 1
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#define T2_IACK_SC 1
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#define WILDFIRE_IACK_SC 1 /* FIXME */
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/*
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* Some helpful macros for filling in the blanks.
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*/
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#define CAT1(x,y) x##y
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#define CAT(x,y) CAT1(x,y)
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#define DO_DEFAULT_RTC .rtc_port = 0x70
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#define DO_EV4_MMU \
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.max_asn = EV4_MAX_ASN, \
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.mv_switch_mm = ev4_switch_mm, \
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.mv_activate_mm = ev4_activate_mm, \
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.mv_flush_tlb_current = ev4_flush_tlb_current, \
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.mv_flush_tlb_current_page = ev4_flush_tlb_current_page
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#define DO_EV5_MMU \
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.max_asn = EV5_MAX_ASN, \
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.mv_switch_mm = ev5_switch_mm, \
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.mv_activate_mm = ev5_activate_mm, \
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.mv_flush_tlb_current = ev5_flush_tlb_current, \
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.mv_flush_tlb_current_page = ev5_flush_tlb_current_page
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#define DO_EV6_MMU \
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.max_asn = EV6_MAX_ASN, \
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.mv_switch_mm = ev5_switch_mm, \
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.mv_activate_mm = ev5_activate_mm, \
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.mv_flush_tlb_current = ev5_flush_tlb_current, \
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.mv_flush_tlb_current_page = ev5_flush_tlb_current_page
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#define DO_EV7_MMU \
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.max_asn = EV6_MAX_ASN, \
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.mv_switch_mm = ev5_switch_mm, \
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.mv_activate_mm = ev5_activate_mm, \
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.mv_flush_tlb_current = ev5_flush_tlb_current, \
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.mv_flush_tlb_current_page = ev5_flush_tlb_current_page
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#define IO_LITE(UP,low) \
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.hae_register = (unsigned long *) CAT(UP,_HAE_ADDRESS), \
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.iack_sc = CAT(UP,_IACK_SC), \
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.mv_ioread8 = CAT(low,_ioread8), \
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.mv_ioread16 = CAT(low,_ioread16), \
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.mv_ioread32 = CAT(low,_ioread32), \
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.mv_iowrite8 = CAT(low,_iowrite8), \
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.mv_iowrite16 = CAT(low,_iowrite16), \
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.mv_iowrite32 = CAT(low,_iowrite32), \
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.mv_readb = CAT(low,_readb), \
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.mv_readw = CAT(low,_readw), \
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.mv_readl = CAT(low,_readl), \
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.mv_readq = CAT(low,_readq), \
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.mv_writeb = CAT(low,_writeb), \
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.mv_writew = CAT(low,_writew), \
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.mv_writel = CAT(low,_writel), \
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.mv_writeq = CAT(low,_writeq), \
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.mv_ioportmap = CAT(low,_ioportmap), \
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.mv_ioremap = CAT(low,_ioremap), \
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.mv_iounmap = CAT(low,_iounmap), \
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.mv_is_ioaddr = CAT(low,_is_ioaddr), \
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.mv_is_mmio = CAT(low,_is_mmio) \
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#define IO(UP,low) \
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IO_LITE(UP,low), \
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.pci_ops = &CAT(low,_pci_ops), \
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.mv_pci_tbi = CAT(low,_pci_tbi)
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#define DO_APECS_IO IO(APECS,apecs)
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#define DO_CIA_IO IO(CIA,cia)
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#define DO_IRONGATE_IO IO(IRONGATE,irongate)
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#define DO_LCA_IO IO(LCA,lca)
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#define DO_MARVEL_IO IO(MARVEL,marvel)
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#define DO_MCPCIA_IO IO(MCPCIA,mcpcia)
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#define DO_POLARIS_IO IO(POLARIS,polaris)
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#define DO_T2_IO IO(T2,t2)
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#define DO_TSUNAMI_IO IO(TSUNAMI,tsunami)
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#define DO_TITAN_IO IO(TITAN,titan)
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#define DO_WILDFIRE_IO IO(WILDFIRE,wildfire)
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#define DO_PYXIS_IO IO_LITE(CIA,cia_bwx), \
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.pci_ops = &cia_pci_ops, \
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.mv_pci_tbi = cia_pci_tbi
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/*
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* In a GENERIC kernel, we have lots of these vectors floating about,
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* all but one of which we want to go away. In a non-GENERIC kernel,
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* we want only one, ever.
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*
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* Accomplish this in the GENERIC kernel by putting all of the vectors
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* in the .init.data section where they'll go away. We'll copy the
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* one we want to the real alpha_mv vector in setup_arch.
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*
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* Accomplish this in a non-GENERIC kernel by ifdef'ing out all but
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* one of the vectors, which will not reside in .init.data. We then
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* alias this one vector to alpha_mv, so no copy is needed.
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*
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* Upshot: set __initdata to nothing for non-GENERIC kernels.
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*/
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#ifdef CONFIG_ALPHA_GENERIC
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#define __initmv __initdata
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#define ALIAS_MV(x)
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#else
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#define __initmv __initdata_refok
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/* GCC actually has a syntax for defining aliases, but is under some
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delusion that you shouldn't be able to declare it extern somewhere
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else beforehand. Fine. We'll do it ourselves. */
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#if 0
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#define ALIAS_MV(system) \
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struct alpha_machine_vector alpha_mv __attribute__((alias(#system "_mv")));
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#else
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#define ALIAS_MV(system) \
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asm(".global alpha_mv\nalpha_mv = " #system "_mv");
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#endif
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#endif /* GENERIC */
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