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linux-next/drivers/crypto/ux500/cryp
Arnd Bergmann e1f8859ee2 crypto: ux500 - make interrupt mode plausible
The interrupt handler in the ux500 crypto driver has an obviously
incorrect way to access the data buffer, which for a while has
caused this build warning:

../ux500/cryp/cryp_core.c: In function 'cryp_interrupt_handler':
../ux500/cryp/cryp_core.c:234:5: warning: passing argument 1 of '__fswab32' makes integer from pointer without a cast [enabled by default]
     writel_relaxed(ctx->indata,
     ^
In file included from ../include/linux/swab.h:4:0,
                 from ../include/uapi/linux/byteorder/big_endian.h:12,
                 from ../include/linux/byteorder/big_endian.h:4,
                 from ../arch/arm/include/uapi/asm/byteorder.h:19,
                 from ../include/asm-generic/bitops/le.h:5,
                 from ../arch/arm/include/asm/bitops.h:340,
                 from ../include/linux/bitops.h:33,
                 from ../include/linux/kernel.h:10,
                 from ../include/linux/clk.h:16,
                 from ../drivers/crypto/ux500/cryp/cryp_core.c:12:
../include/uapi/linux/swab.h:57:119: note: expected '__u32' but argument is of type 'const u8 *'
 static inline __attribute_const__ __u32 __fswab32(__u32 val)

There are at least two, possibly three problems here:
a) when writing into the FIFO, we copy the pointer rather than the
   actual data we want to give to the hardware
b) the data pointer is an array of 8-bit values, while the FIFO
   is 32-bit wide, so both the read and write access fail to do
   a proper type conversion
c) This seems incorrect for big-endian kernels, on which we need to
   byte-swap any register access, but not normally FIFO accesses,
   at least the DMA case doesn't do it either.

This converts the bogus loop to use the same readsl/writesl pair
that we use for the two other modes (DMA and polling). This is
more efficient and consistent, and probably correct for endianess.

The bug has existed since the driver was first merged, and was
probably never detected because nobody tried to use interrupt mode.
It might make sense to backport this fix to stable kernels, depending
on how the crypto maintainers feel about that.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Cc: linux-crypto@vger.kernel.org
Cc: Fabio Baltieri <fabio.baltieri@linaro.org>
Cc: Linus Walleij <linus.walleij@linaro.org>
Cc: Herbert Xu <herbert@gondor.apana.org.au>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: stable@vger.kernel.org
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2014-07-03 21:42:10 +08:00
..
cryp_core.c crypto: ux500 - make interrupt mode plausible 2014-07-03 21:42:10 +08:00
cryp_irq.c crypto: ux500 - Add driver for CRYP hardware 2012-05-04 19:04:51 +10:00
cryp_irq.h crypto: ux500 - Add driver for CRYP hardware 2012-05-04 19:04:51 +10:00
cryp_irqp.h crypto: ux500 - Add driver for CRYP hardware 2012-05-04 19:04:51 +10:00
cryp_p.h crypto: ux500 - Cleanup hardware identification 2012-05-15 17:25:33 +10:00
cryp.c crypto: ux500/crypt: add missing __iomem qualifiers 2013-06-25 14:51:22 +02:00
cryp.h crypto: ux500/cryp - Set DMA configuration though dma_slave_config() 2013-05-23 21:14:17 +02:00
Makefile crypto: ux500 - Add driver for CRYP hardware 2012-05-04 19:04:51 +10:00