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a96ab03917
The GIC include file being used by some of the KVM assembly code, wrap the C definitions with a #ifdef __ASSEMBLY__ guard. Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
80 lines
2.1 KiB
C
80 lines
2.1 KiB
C
/*
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* include/linux/irqchip/arm-gic.h
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*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __LINUX_IRQCHIP_ARM_GIC_H
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#define __LINUX_IRQCHIP_ARM_GIC_H
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#define GIC_CPU_CTRL 0x00
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#define GIC_CPU_PRIMASK 0x04
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#define GIC_CPU_BINPOINT 0x08
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#define GIC_CPU_INTACK 0x0c
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#define GIC_CPU_EOI 0x10
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#define GIC_CPU_RUNNINGPRI 0x14
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#define GIC_CPU_HIGHPRI 0x18
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#define GIC_DIST_CTRL 0x000
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#define GIC_DIST_CTR 0x004
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#define GIC_DIST_IGROUP 0x080
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#define GIC_DIST_ENABLE_SET 0x100
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#define GIC_DIST_ENABLE_CLEAR 0x180
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#define GIC_DIST_PENDING_SET 0x200
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#define GIC_DIST_PENDING_CLEAR 0x280
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#define GIC_DIST_ACTIVE_SET 0x300
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#define GIC_DIST_ACTIVE_CLEAR 0x380
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#define GIC_DIST_PRI 0x400
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#define GIC_DIST_TARGET 0x800
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#define GIC_DIST_CONFIG 0xc00
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#define GIC_DIST_SOFTINT 0xf00
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#define GICH_HCR 0x0
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#define GICH_VTR 0x4
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#define GICH_VMCR 0x8
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#define GICH_MISR 0x10
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#define GICH_EISR0 0x20
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#define GICH_EISR1 0x24
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#define GICH_ELRSR0 0x30
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#define GICH_ELRSR1 0x34
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#define GICH_APR 0xf0
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#define GICH_LR0 0x100
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#define GICH_HCR_EN (1 << 0)
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#define GICH_HCR_UIE (1 << 1)
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#define GICH_LR_VIRTUALID (0x3ff << 0)
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#define GICH_LR_PHYSID_CPUID_SHIFT (10)
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#define GICH_LR_PHYSID_CPUID (7 << GICH_LR_PHYSID_CPUID_SHIFT)
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#define GICH_LR_STATE (3 << 28)
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#define GICH_LR_PENDING_BIT (1 << 28)
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#define GICH_LR_ACTIVE_BIT (1 << 29)
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#define GICH_LR_EOI (1 << 19)
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#define GICH_MISR_EOI (1 << 0)
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#define GICH_MISR_U (1 << 1)
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#ifndef __ASSEMBLY__
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struct device_node;
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extern struct irq_chip gic_arch_extn;
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void gic_init_bases(unsigned int, int, void __iomem *, void __iomem *,
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u32 offset, struct device_node *);
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void gic_secondary_init(unsigned int);
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void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
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static inline void gic_init(unsigned int nr, int start,
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void __iomem *dist , void __iomem *cpu)
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{
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gic_init_bases(nr, start, dist, cpu, 0, NULL);
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}
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#endif /* __ASSEMBLY */
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#endif
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