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https://github.com/edk2-porting/linux-next.git
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691e95fd73
We can disable a THP split or a hugepage collapse by disabling irq. We do send IPI to all the cpus in the early part of split/collapse, and disabling local irq ensure we don't make progress with split/collapse. If the THP is getting split we return NULL from find_linux_pte_or_hugepte(). For all the current callers it should be ok. We need to be careful if we want to use returned pte_t pointer outside the irq disabled region. W.r.t to THP split, the pfn remains the same, but then a hugepage collapse will result in a pfn change. There are few steps we can take to avoid a hugepage collapse.One way is to take page reference inside the irq disable region. Other option is to take mmap_sem so that a parallel collapse will not happen. We can also disable collapse by taking pmd_lock. Another method used by kvm subsystem is to check whether we had a mmu_notifer update in between using mmu_notifier_retry(). Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
814 lines
21 KiB
C
814 lines
21 KiB
C
/*
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* Copyright (C) 2008-2013 Freescale Semiconductor, Inc. All rights reserved.
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*
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* Author: Yu Liu, yu.liu@freescale.com
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* Scott Wood, scottwood@freescale.com
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* Ashish Kalra, ashish.kalra@freescale.com
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* Varun Sethi, varun.sethi@freescale.com
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* Alexander Graf, agraf@suse.de
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*
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* Description:
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* This file is based on arch/powerpc/kvm/44x_tlb.c,
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* by Hollis Blanchard <hollisb@us.ibm.com>.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, version 2, as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/string.h>
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#include <linux/kvm.h>
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#include <linux/kvm_host.h>
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#include <linux/highmem.h>
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#include <linux/log2.h>
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#include <linux/uaccess.h>
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#include <linux/sched.h>
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#include <linux/rwsem.h>
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#include <linux/vmalloc.h>
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#include <linux/hugetlb.h>
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#include <asm/kvm_ppc.h>
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#include "e500.h"
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#include "timing.h"
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#include "e500_mmu_host.h"
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#include "trace_booke.h"
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#define to_htlb1_esel(esel) (host_tlb_params[1].entries - (esel) - 1)
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static struct kvmppc_e500_tlb_params host_tlb_params[E500_TLB_NUM];
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static inline unsigned int tlb1_max_shadow_size(void)
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{
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/* reserve one entry for magic page */
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return host_tlb_params[1].entries - tlbcam_index - 1;
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}
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static inline u32 e500_shadow_mas3_attrib(u32 mas3, int usermode)
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{
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/* Mask off reserved bits. */
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mas3 &= MAS3_ATTRIB_MASK;
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#ifndef CONFIG_KVM_BOOKE_HV
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if (!usermode) {
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/* Guest is in supervisor mode,
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* so we need to translate guest
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* supervisor permissions into user permissions. */
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mas3 &= ~E500_TLB_USER_PERM_MASK;
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mas3 |= (mas3 & E500_TLB_SUPER_PERM_MASK) << 1;
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}
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mas3 |= E500_TLB_SUPER_PERM_MASK;
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#endif
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return mas3;
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}
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/*
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* writing shadow tlb entry to host TLB
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*/
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static inline void __write_host_tlbe(struct kvm_book3e_206_tlb_entry *stlbe,
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uint32_t mas0,
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uint32_t lpid)
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{
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unsigned long flags;
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local_irq_save(flags);
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mtspr(SPRN_MAS0, mas0);
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mtspr(SPRN_MAS1, stlbe->mas1);
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mtspr(SPRN_MAS2, (unsigned long)stlbe->mas2);
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mtspr(SPRN_MAS3, (u32)stlbe->mas7_3);
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mtspr(SPRN_MAS7, (u32)(stlbe->mas7_3 >> 32));
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#ifdef CONFIG_KVM_BOOKE_HV
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mtspr(SPRN_MAS8, MAS8_TGS | get_thread_specific_lpid(lpid));
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#endif
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asm volatile("isync; tlbwe" : : : "memory");
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#ifdef CONFIG_KVM_BOOKE_HV
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/* Must clear mas8 for other host tlbwe's */
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mtspr(SPRN_MAS8, 0);
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isync();
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#endif
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local_irq_restore(flags);
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trace_kvm_booke206_stlb_write(mas0, stlbe->mas8, stlbe->mas1,
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stlbe->mas2, stlbe->mas7_3);
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}
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/*
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* Acquire a mas0 with victim hint, as if we just took a TLB miss.
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*
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* We don't care about the address we're searching for, other than that it's
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* in the right set and is not present in the TLB. Using a zero PID and a
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* userspace address means we don't have to set and then restore MAS5, or
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* calculate a proper MAS6 value.
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*/
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static u32 get_host_mas0(unsigned long eaddr)
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{
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unsigned long flags;
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u32 mas0;
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u32 mas4;
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local_irq_save(flags);
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mtspr(SPRN_MAS6, 0);
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mas4 = mfspr(SPRN_MAS4);
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mtspr(SPRN_MAS4, mas4 & ~MAS4_TLBSEL_MASK);
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asm volatile("tlbsx 0, %0" : : "b" (eaddr & ~CONFIG_PAGE_OFFSET));
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mas0 = mfspr(SPRN_MAS0);
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mtspr(SPRN_MAS4, mas4);
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local_irq_restore(flags);
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return mas0;
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}
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/* sesel is for tlb1 only */
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static inline void write_host_tlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
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int tlbsel, int sesel, struct kvm_book3e_206_tlb_entry *stlbe)
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{
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u32 mas0;
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if (tlbsel == 0) {
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mas0 = get_host_mas0(stlbe->mas2);
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__write_host_tlbe(stlbe, mas0, vcpu_e500->vcpu.kvm->arch.lpid);
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} else {
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__write_host_tlbe(stlbe,
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MAS0_TLBSEL(1) |
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MAS0_ESEL(to_htlb1_esel(sesel)),
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vcpu_e500->vcpu.kvm->arch.lpid);
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}
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}
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/* sesel is for tlb1 only */
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static void write_stlbe(struct kvmppc_vcpu_e500 *vcpu_e500,
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struct kvm_book3e_206_tlb_entry *gtlbe,
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struct kvm_book3e_206_tlb_entry *stlbe,
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int stlbsel, int sesel)
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{
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int stid;
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preempt_disable();
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stid = kvmppc_e500_get_tlb_stid(&vcpu_e500->vcpu, gtlbe);
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stlbe->mas1 |= MAS1_TID(stid);
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write_host_tlbe(vcpu_e500, stlbsel, sesel, stlbe);
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preempt_enable();
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}
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#ifdef CONFIG_KVM_E500V2
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/* XXX should be a hook in the gva2hpa translation */
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void kvmppc_map_magic(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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struct kvm_book3e_206_tlb_entry magic;
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ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
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unsigned int stid;
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pfn_t pfn;
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pfn = (pfn_t)virt_to_phys((void *)shared_page) >> PAGE_SHIFT;
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get_page(pfn_to_page(pfn));
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preempt_disable();
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stid = kvmppc_e500_get_sid(vcpu_e500, 0, 0, 0, 0);
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magic.mas1 = MAS1_VALID | MAS1_TS | MAS1_TID(stid) |
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MAS1_TSIZE(BOOK3E_PAGESZ_4K);
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magic.mas2 = vcpu->arch.magic_page_ea | MAS2_M;
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magic.mas7_3 = ((u64)pfn << PAGE_SHIFT) |
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MAS3_SW | MAS3_SR | MAS3_UW | MAS3_UR;
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magic.mas8 = 0;
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__write_host_tlbe(&magic, MAS0_TLBSEL(1) | MAS0_ESEL(tlbcam_index), 0);
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preempt_enable();
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}
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#endif
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void inval_gtlbe_on_host(struct kvmppc_vcpu_e500 *vcpu_e500, int tlbsel,
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int esel)
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{
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struct kvm_book3e_206_tlb_entry *gtlbe =
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get_entry(vcpu_e500, tlbsel, esel);
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struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[tlbsel][esel].ref;
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/* Don't bother with unmapped entries */
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if (!(ref->flags & E500_TLB_VALID)) {
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WARN(ref->flags & (E500_TLB_BITMAP | E500_TLB_TLB0),
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"%s: flags %x\n", __func__, ref->flags);
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WARN_ON(tlbsel == 1 && vcpu_e500->g2h_tlb1_map[esel]);
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}
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if (tlbsel == 1 && ref->flags & E500_TLB_BITMAP) {
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u64 tmp = vcpu_e500->g2h_tlb1_map[esel];
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int hw_tlb_indx;
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unsigned long flags;
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local_irq_save(flags);
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while (tmp) {
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hw_tlb_indx = __ilog2_u64(tmp & -tmp);
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mtspr(SPRN_MAS0,
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MAS0_TLBSEL(1) |
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MAS0_ESEL(to_htlb1_esel(hw_tlb_indx)));
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mtspr(SPRN_MAS1, 0);
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asm volatile("tlbwe");
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vcpu_e500->h2g_tlb1_rmap[hw_tlb_indx] = 0;
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tmp &= tmp - 1;
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}
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mb();
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vcpu_e500->g2h_tlb1_map[esel] = 0;
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ref->flags &= ~(E500_TLB_BITMAP | E500_TLB_VALID);
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local_irq_restore(flags);
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}
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if (tlbsel == 1 && ref->flags & E500_TLB_TLB0) {
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/*
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* TLB1 entry is backed by 4k pages. This should happen
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* rarely and is not worth optimizing. Invalidate everything.
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*/
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kvmppc_e500_tlbil_all(vcpu_e500);
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ref->flags &= ~(E500_TLB_TLB0 | E500_TLB_VALID);
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}
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/*
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* If TLB entry is still valid then it's a TLB0 entry, and thus
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* backed by at most one host tlbe per shadow pid
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*/
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if (ref->flags & E500_TLB_VALID)
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kvmppc_e500_tlbil_one(vcpu_e500, gtlbe);
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/* Mark the TLB as not backed by the host anymore */
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ref->flags = 0;
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}
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static inline int tlbe_is_writable(struct kvm_book3e_206_tlb_entry *tlbe)
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{
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return tlbe->mas7_3 & (MAS3_SW|MAS3_UW);
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}
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static inline void kvmppc_e500_ref_setup(struct tlbe_ref *ref,
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struct kvm_book3e_206_tlb_entry *gtlbe,
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pfn_t pfn, unsigned int wimg)
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{
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ref->pfn = pfn;
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ref->flags = E500_TLB_VALID;
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/* Use guest supplied MAS2_G and MAS2_E */
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ref->flags |= (gtlbe->mas2 & MAS2_ATTRIB_MASK) | wimg;
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/* Mark the page accessed */
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kvm_set_pfn_accessed(pfn);
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if (tlbe_is_writable(gtlbe))
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kvm_set_pfn_dirty(pfn);
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}
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static inline void kvmppc_e500_ref_release(struct tlbe_ref *ref)
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{
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if (ref->flags & E500_TLB_VALID) {
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/* FIXME: don't log bogus pfn for TLB1 */
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trace_kvm_booke206_ref_release(ref->pfn, ref->flags);
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ref->flags = 0;
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}
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}
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static void clear_tlb1_bitmap(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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if (vcpu_e500->g2h_tlb1_map)
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memset(vcpu_e500->g2h_tlb1_map, 0,
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sizeof(u64) * vcpu_e500->gtlb_params[1].entries);
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if (vcpu_e500->h2g_tlb1_rmap)
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memset(vcpu_e500->h2g_tlb1_rmap, 0,
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sizeof(unsigned int) * host_tlb_params[1].entries);
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}
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static void clear_tlb_privs(struct kvmppc_vcpu_e500 *vcpu_e500)
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{
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int tlbsel;
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int i;
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for (tlbsel = 0; tlbsel <= 1; tlbsel++) {
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for (i = 0; i < vcpu_e500->gtlb_params[tlbsel].entries; i++) {
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struct tlbe_ref *ref =
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&vcpu_e500->gtlb_priv[tlbsel][i].ref;
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kvmppc_e500_ref_release(ref);
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}
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}
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}
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void kvmppc_core_flush_tlb(struct kvm_vcpu *vcpu)
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{
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struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
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kvmppc_e500_tlbil_all(vcpu_e500);
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clear_tlb_privs(vcpu_e500);
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clear_tlb1_bitmap(vcpu_e500);
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}
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/* TID must be supplied by the caller */
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static void kvmppc_e500_setup_stlbe(
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struct kvm_vcpu *vcpu,
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struct kvm_book3e_206_tlb_entry *gtlbe,
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int tsize, struct tlbe_ref *ref, u64 gvaddr,
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struct kvm_book3e_206_tlb_entry *stlbe)
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{
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pfn_t pfn = ref->pfn;
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u32 pr = vcpu->arch.shared->msr & MSR_PR;
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BUG_ON(!(ref->flags & E500_TLB_VALID));
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/* Force IPROT=0 for all guest mappings. */
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stlbe->mas1 = MAS1_TSIZE(tsize) | get_tlb_sts(gtlbe) | MAS1_VALID;
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stlbe->mas2 = (gvaddr & MAS2_EPN) | (ref->flags & E500_TLB_MAS2_ATTR);
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stlbe->mas7_3 = ((u64)pfn << PAGE_SHIFT) |
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e500_shadow_mas3_attrib(gtlbe->mas7_3, pr);
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}
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static inline int kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
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u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
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int tlbsel, struct kvm_book3e_206_tlb_entry *stlbe,
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struct tlbe_ref *ref)
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{
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struct kvm_memory_slot *slot;
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unsigned long pfn = 0; /* silence GCC warning */
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unsigned long hva;
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int pfnmap = 0;
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int tsize = BOOK3E_PAGESZ_4K;
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int ret = 0;
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unsigned long mmu_seq;
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struct kvm *kvm = vcpu_e500->vcpu.kvm;
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unsigned long tsize_pages = 0;
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pte_t *ptep;
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unsigned int wimg = 0;
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pgd_t *pgdir;
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unsigned long flags;
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/* used to check for invalidations in progress */
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mmu_seq = kvm->mmu_notifier_seq;
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smp_rmb();
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/*
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* Translate guest physical to true physical, acquiring
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* a page reference if it is normal, non-reserved memory.
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*
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* gfn_to_memslot() must succeed because otherwise we wouldn't
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* have gotten this far. Eventually we should just pass the slot
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* pointer through from the first lookup.
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*/
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slot = gfn_to_memslot(vcpu_e500->vcpu.kvm, gfn);
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hva = gfn_to_hva_memslot(slot, gfn);
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if (tlbsel == 1) {
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struct vm_area_struct *vma;
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down_read(¤t->mm->mmap_sem);
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vma = find_vma(current->mm, hva);
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if (vma && hva >= vma->vm_start &&
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(vma->vm_flags & VM_PFNMAP)) {
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/*
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* This VMA is a physically contiguous region (e.g.
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* /dev/mem) that bypasses normal Linux page
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* management. Find the overlap between the
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* vma and the memslot.
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*/
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unsigned long start, end;
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unsigned long slot_start, slot_end;
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pfnmap = 1;
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start = vma->vm_pgoff;
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end = start +
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((vma->vm_end - vma->vm_start) >> PAGE_SHIFT);
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pfn = start + ((hva - vma->vm_start) >> PAGE_SHIFT);
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slot_start = pfn - (gfn - slot->base_gfn);
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slot_end = slot_start + slot->npages;
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if (start < slot_start)
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start = slot_start;
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if (end > slot_end)
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end = slot_end;
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tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
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MAS1_TSIZE_SHIFT;
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/*
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* e500 doesn't implement the lowest tsize bit,
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* or 1K pages.
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*/
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tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
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/*
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* Now find the largest tsize (up to what the guest
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* requested) that will cover gfn, stay within the
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* range, and for which gfn and pfn are mutually
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* aligned.
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*/
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for (; tsize > BOOK3E_PAGESZ_4K; tsize -= 2) {
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unsigned long gfn_start, gfn_end;
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tsize_pages = 1 << (tsize - 2);
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gfn_start = gfn & ~(tsize_pages - 1);
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gfn_end = gfn_start + tsize_pages;
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if (gfn_start + pfn - gfn < start)
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continue;
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if (gfn_end + pfn - gfn > end)
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continue;
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if ((gfn & (tsize_pages - 1)) !=
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(pfn & (tsize_pages - 1)))
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continue;
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gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
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pfn &= ~(tsize_pages - 1);
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break;
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}
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} else if (vma && hva >= vma->vm_start &&
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(vma->vm_flags & VM_HUGETLB)) {
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unsigned long psize = vma_kernel_pagesize(vma);
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tsize = (gtlbe->mas1 & MAS1_TSIZE_MASK) >>
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MAS1_TSIZE_SHIFT;
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/*
|
|
* Take the largest page size that satisfies both host
|
|
* and guest mapping
|
|
*/
|
|
tsize = min(__ilog2(psize) - 10, tsize);
|
|
|
|
/*
|
|
* e500 doesn't implement the lowest tsize bit,
|
|
* or 1K pages.
|
|
*/
|
|
tsize = max(BOOK3E_PAGESZ_4K, tsize & ~1);
|
|
}
|
|
|
|
up_read(¤t->mm->mmap_sem);
|
|
}
|
|
|
|
if (likely(!pfnmap)) {
|
|
tsize_pages = 1 << (tsize + 10 - PAGE_SHIFT);
|
|
pfn = gfn_to_pfn_memslot(slot, gfn);
|
|
if (is_error_noslot_pfn(pfn)) {
|
|
if (printk_ratelimit())
|
|
pr_err("%s: real page not found for gfn %lx\n",
|
|
__func__, (long)gfn);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Align guest and physical address to page map boundaries */
|
|
pfn &= ~(tsize_pages - 1);
|
|
gvaddr &= ~((tsize_pages << PAGE_SHIFT) - 1);
|
|
}
|
|
|
|
spin_lock(&kvm->mmu_lock);
|
|
if (mmu_notifier_retry(kvm, mmu_seq)) {
|
|
ret = -EAGAIN;
|
|
goto out;
|
|
}
|
|
|
|
|
|
pgdir = vcpu_e500->vcpu.arch.pgdir;
|
|
/*
|
|
* We are just looking at the wimg bits, so we don't
|
|
* care much about the trans splitting bit.
|
|
* We are holding kvm->mmu_lock so a notifier invalidate
|
|
* can't run hence pfn won't change.
|
|
*/
|
|
local_irq_save(flags);
|
|
ptep = find_linux_pte_or_hugepte(pgdir, hva, NULL);
|
|
if (ptep) {
|
|
pte_t pte = READ_ONCE(*ptep);
|
|
|
|
if (pte_present(pte)) {
|
|
wimg = (pte_val(pte) >> PTE_WIMGE_SHIFT) &
|
|
MAS2_WIMGE_MASK;
|
|
local_irq_restore(flags);
|
|
} else {
|
|
local_irq_restore(flags);
|
|
pr_err_ratelimited("%s: pte not present: gfn %lx,pfn %lx\n",
|
|
__func__, (long)gfn, pfn);
|
|
ret = -EINVAL;
|
|
goto out;
|
|
}
|
|
}
|
|
kvmppc_e500_ref_setup(ref, gtlbe, pfn, wimg);
|
|
|
|
kvmppc_e500_setup_stlbe(&vcpu_e500->vcpu, gtlbe, tsize,
|
|
ref, gvaddr, stlbe);
|
|
|
|
/* Clear i-cache for new pages */
|
|
kvmppc_mmu_flush_icache(pfn);
|
|
|
|
out:
|
|
spin_unlock(&kvm->mmu_lock);
|
|
|
|
/* Drop refcount on page, so that mmu notifiers can clear it */
|
|
kvm_release_pfn_clean(pfn);
|
|
|
|
return ret;
|
|
}
|
|
|
|
/* XXX only map the one-one case, for now use TLB0 */
|
|
static int kvmppc_e500_tlb0_map(struct kvmppc_vcpu_e500 *vcpu_e500, int esel,
|
|
struct kvm_book3e_206_tlb_entry *stlbe)
|
|
{
|
|
struct kvm_book3e_206_tlb_entry *gtlbe;
|
|
struct tlbe_ref *ref;
|
|
int stlbsel = 0;
|
|
int sesel = 0;
|
|
int r;
|
|
|
|
gtlbe = get_entry(vcpu_e500, 0, esel);
|
|
ref = &vcpu_e500->gtlb_priv[0][esel].ref;
|
|
|
|
r = kvmppc_e500_shadow_map(vcpu_e500, get_tlb_eaddr(gtlbe),
|
|
get_tlb_raddr(gtlbe) >> PAGE_SHIFT,
|
|
gtlbe, 0, stlbe, ref);
|
|
if (r)
|
|
return r;
|
|
|
|
write_stlbe(vcpu_e500, gtlbe, stlbe, stlbsel, sesel);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int kvmppc_e500_tlb1_map_tlb1(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
struct tlbe_ref *ref,
|
|
int esel)
|
|
{
|
|
unsigned int sesel = vcpu_e500->host_tlb1_nv++;
|
|
|
|
if (unlikely(vcpu_e500->host_tlb1_nv >= tlb1_max_shadow_size()))
|
|
vcpu_e500->host_tlb1_nv = 0;
|
|
|
|
if (vcpu_e500->h2g_tlb1_rmap[sesel]) {
|
|
unsigned int idx = vcpu_e500->h2g_tlb1_rmap[sesel] - 1;
|
|
vcpu_e500->g2h_tlb1_map[idx] &= ~(1ULL << sesel);
|
|
}
|
|
|
|
vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_BITMAP;
|
|
vcpu_e500->g2h_tlb1_map[esel] |= (u64)1 << sesel;
|
|
vcpu_e500->h2g_tlb1_rmap[sesel] = esel + 1;
|
|
WARN_ON(!(ref->flags & E500_TLB_VALID));
|
|
|
|
return sesel;
|
|
}
|
|
|
|
/* Caller must ensure that the specified guest TLB entry is safe to insert into
|
|
* the shadow TLB. */
|
|
/* For both one-one and one-to-many */
|
|
static int kvmppc_e500_tlb1_map(struct kvmppc_vcpu_e500 *vcpu_e500,
|
|
u64 gvaddr, gfn_t gfn, struct kvm_book3e_206_tlb_entry *gtlbe,
|
|
struct kvm_book3e_206_tlb_entry *stlbe, int esel)
|
|
{
|
|
struct tlbe_ref *ref = &vcpu_e500->gtlb_priv[1][esel].ref;
|
|
int sesel;
|
|
int r;
|
|
|
|
r = kvmppc_e500_shadow_map(vcpu_e500, gvaddr, gfn, gtlbe, 1, stlbe,
|
|
ref);
|
|
if (r)
|
|
return r;
|
|
|
|
/* Use TLB0 when we can only map a page with 4k */
|
|
if (get_tlb_tsize(stlbe) == BOOK3E_PAGESZ_4K) {
|
|
vcpu_e500->gtlb_priv[1][esel].ref.flags |= E500_TLB_TLB0;
|
|
write_stlbe(vcpu_e500, gtlbe, stlbe, 0, 0);
|
|
return 0;
|
|
}
|
|
|
|
/* Otherwise map into TLB1 */
|
|
sesel = kvmppc_e500_tlb1_map_tlb1(vcpu_e500, ref, esel);
|
|
write_stlbe(vcpu_e500, gtlbe, stlbe, 1, sesel);
|
|
|
|
return 0;
|
|
}
|
|
|
|
void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 eaddr, gpa_t gpaddr,
|
|
unsigned int index)
|
|
{
|
|
struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
|
|
struct tlbe_priv *priv;
|
|
struct kvm_book3e_206_tlb_entry *gtlbe, stlbe;
|
|
int tlbsel = tlbsel_of(index);
|
|
int esel = esel_of(index);
|
|
|
|
gtlbe = get_entry(vcpu_e500, tlbsel, esel);
|
|
|
|
switch (tlbsel) {
|
|
case 0:
|
|
priv = &vcpu_e500->gtlb_priv[tlbsel][esel];
|
|
|
|
/* Triggers after clear_tlb_privs or on initial mapping */
|
|
if (!(priv->ref.flags & E500_TLB_VALID)) {
|
|
kvmppc_e500_tlb0_map(vcpu_e500, esel, &stlbe);
|
|
} else {
|
|
kvmppc_e500_setup_stlbe(vcpu, gtlbe, BOOK3E_PAGESZ_4K,
|
|
&priv->ref, eaddr, &stlbe);
|
|
write_stlbe(vcpu_e500, gtlbe, &stlbe, 0, 0);
|
|
}
|
|
break;
|
|
|
|
case 1: {
|
|
gfn_t gfn = gpaddr >> PAGE_SHIFT;
|
|
kvmppc_e500_tlb1_map(vcpu_e500, eaddr, gfn, gtlbe, &stlbe,
|
|
esel);
|
|
break;
|
|
}
|
|
|
|
default:
|
|
BUG();
|
|
break;
|
|
}
|
|
}
|
|
|
|
#ifdef CONFIG_KVM_BOOKE_HV
|
|
int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type,
|
|
u32 *instr)
|
|
{
|
|
gva_t geaddr;
|
|
hpa_t addr;
|
|
hfn_t pfn;
|
|
hva_t eaddr;
|
|
u32 mas1, mas2, mas3;
|
|
u64 mas7_mas3;
|
|
struct page *page;
|
|
unsigned int addr_space, psize_shift;
|
|
bool pr;
|
|
unsigned long flags;
|
|
|
|
/* Search TLB for guest pc to get the real address */
|
|
geaddr = kvmppc_get_pc(vcpu);
|
|
|
|
addr_space = (vcpu->arch.shared->msr & MSR_IS) >> MSR_IR_LG;
|
|
|
|
local_irq_save(flags);
|
|
mtspr(SPRN_MAS6, (vcpu->arch.pid << MAS6_SPID_SHIFT) | addr_space);
|
|
mtspr(SPRN_MAS5, MAS5_SGS | get_lpid(vcpu));
|
|
asm volatile("tlbsx 0, %[geaddr]\n" : :
|
|
[geaddr] "r" (geaddr));
|
|
mtspr(SPRN_MAS5, 0);
|
|
mtspr(SPRN_MAS8, 0);
|
|
mas1 = mfspr(SPRN_MAS1);
|
|
mas2 = mfspr(SPRN_MAS2);
|
|
mas3 = mfspr(SPRN_MAS3);
|
|
#ifdef CONFIG_64BIT
|
|
mas7_mas3 = mfspr(SPRN_MAS7_MAS3);
|
|
#else
|
|
mas7_mas3 = ((u64)mfspr(SPRN_MAS7) << 32) | mas3;
|
|
#endif
|
|
local_irq_restore(flags);
|
|
|
|
/*
|
|
* If the TLB entry for guest pc was evicted, return to the guest.
|
|
* There are high chances to find a valid TLB entry next time.
|
|
*/
|
|
if (!(mas1 & MAS1_VALID))
|
|
return EMULATE_AGAIN;
|
|
|
|
/*
|
|
* Another thread may rewrite the TLB entry in parallel, don't
|
|
* execute from the address if the execute permission is not set
|
|
*/
|
|
pr = vcpu->arch.shared->msr & MSR_PR;
|
|
if (unlikely((pr && !(mas3 & MAS3_UX)) ||
|
|
(!pr && !(mas3 & MAS3_SX)))) {
|
|
pr_err_ratelimited(
|
|
"%s: Instruction emulation from guest address %08lx without execute permission\n",
|
|
__func__, geaddr);
|
|
return EMULATE_AGAIN;
|
|
}
|
|
|
|
/*
|
|
* The real address will be mapped by a cacheable, memory coherent,
|
|
* write-back page. Check for mismatches when LRAT is used.
|
|
*/
|
|
if (has_feature(vcpu, VCPU_FTR_MMU_V2) &&
|
|
unlikely((mas2 & MAS2_I) || (mas2 & MAS2_W) || !(mas2 & MAS2_M))) {
|
|
pr_err_ratelimited(
|
|
"%s: Instruction emulation from guest address %08lx mismatches storage attributes\n",
|
|
__func__, geaddr);
|
|
return EMULATE_AGAIN;
|
|
}
|
|
|
|
/* Get pfn */
|
|
psize_shift = MAS1_GET_TSIZE(mas1) + 10;
|
|
addr = (mas7_mas3 & (~0ULL << psize_shift)) |
|
|
(geaddr & ((1ULL << psize_shift) - 1ULL));
|
|
pfn = addr >> PAGE_SHIFT;
|
|
|
|
/* Guard against emulation from devices area */
|
|
if (unlikely(!page_is_ram(pfn))) {
|
|
pr_err_ratelimited("%s: Instruction emulation from non-RAM host address %08llx is not supported\n",
|
|
__func__, addr);
|
|
return EMULATE_AGAIN;
|
|
}
|
|
|
|
/* Map a page and get guest's instruction */
|
|
page = pfn_to_page(pfn);
|
|
eaddr = (unsigned long)kmap_atomic(page);
|
|
*instr = *(u32 *)(eaddr | (unsigned long)(addr & ~PAGE_MASK));
|
|
kunmap_atomic((u32 *)eaddr);
|
|
|
|
return EMULATE_DONE;
|
|
}
|
|
#else
|
|
int kvmppc_load_last_inst(struct kvm_vcpu *vcpu, enum instruction_type type,
|
|
u32 *instr)
|
|
{
|
|
return EMULATE_AGAIN;
|
|
}
|
|
#endif
|
|
|
|
/************* MMU Notifiers *************/
|
|
|
|
int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
trace_kvm_unmap_hva(hva);
|
|
|
|
/*
|
|
* Flush all shadow tlb entries everywhere. This is slow, but
|
|
* we are 100% sure that we catch the to be unmapped page
|
|
*/
|
|
kvm_flush_remote_tlbs(kvm);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_unmap_hva_range(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
{
|
|
/* kvm_unmap_hva flushes everything anyways */
|
|
kvm_unmap_hva(kvm, start);
|
|
|
|
return 0;
|
|
}
|
|
|
|
int kvm_age_hva(struct kvm *kvm, unsigned long start, unsigned long end)
|
|
{
|
|
/* XXX could be more clever ;) */
|
|
return 0;
|
|
}
|
|
|
|
int kvm_test_age_hva(struct kvm *kvm, unsigned long hva)
|
|
{
|
|
/* XXX could be more clever ;) */
|
|
return 0;
|
|
}
|
|
|
|
void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
|
|
{
|
|
/* The page will get remapped properly on its next fault */
|
|
kvm_unmap_hva(kvm, hva);
|
|
}
|
|
|
|
/*****************************************/
|
|
|
|
int e500_mmu_host_init(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
host_tlb_params[0].entries = mfspr(SPRN_TLB0CFG) & TLBnCFG_N_ENTRY;
|
|
host_tlb_params[1].entries = mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY;
|
|
|
|
/*
|
|
* This should never happen on real e500 hardware, but is
|
|
* architecturally possible -- e.g. in some weird nested
|
|
* virtualization case.
|
|
*/
|
|
if (host_tlb_params[0].entries == 0 ||
|
|
host_tlb_params[1].entries == 0) {
|
|
pr_err("%s: need to know host tlb size\n", __func__);
|
|
return -ENODEV;
|
|
}
|
|
|
|
host_tlb_params[0].ways = (mfspr(SPRN_TLB0CFG) & TLBnCFG_ASSOC) >>
|
|
TLBnCFG_ASSOC_SHIFT;
|
|
host_tlb_params[1].ways = host_tlb_params[1].entries;
|
|
|
|
if (!is_power_of_2(host_tlb_params[0].entries) ||
|
|
!is_power_of_2(host_tlb_params[0].ways) ||
|
|
host_tlb_params[0].entries < host_tlb_params[0].ways ||
|
|
host_tlb_params[0].ways == 0) {
|
|
pr_err("%s: bad tlb0 host config: %u entries %u ways\n",
|
|
__func__, host_tlb_params[0].entries,
|
|
host_tlb_params[0].ways);
|
|
return -ENODEV;
|
|
}
|
|
|
|
host_tlb_params[0].sets =
|
|
host_tlb_params[0].entries / host_tlb_params[0].ways;
|
|
host_tlb_params[1].sets = 1;
|
|
|
|
vcpu_e500->h2g_tlb1_rmap = kzalloc(sizeof(unsigned int) *
|
|
host_tlb_params[1].entries,
|
|
GFP_KERNEL);
|
|
if (!vcpu_e500->h2g_tlb1_rmap)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
|
|
void e500_mmu_host_uninit(struct kvmppc_vcpu_e500 *vcpu_e500)
|
|
{
|
|
kfree(vcpu_e500->h2g_tlb1_rmap);
|
|
}
|