mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-21 03:33:59 +08:00
1da177e4c3
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
522 lines
12 KiB
C
522 lines
12 KiB
C
/*
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* eisa_enumerator.c - provide support for EISA adapters in PA-RISC machines
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Copyright (c) 2002 Daniel Engstrom <5116@telia.com>
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*
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*/
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/slab.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/byteorder.h>
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#include <asm/eisa_bus.h>
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#include <asm/eisa_eeprom.h>
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/*
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* Todo:
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*
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* PORT init with MASK attr and other size than byte
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* MEMORY with other decode than 20 bit
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* CRC stuff
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* FREEFORM stuff
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*/
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#define EPI 0xc80
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#define NUM_SLOT 16
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#define SLOT2PORT(x) (x<<12)
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/* macros to handle unaligned accesses and
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* byte swapping. The data in the EEPROM is
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* little-endian on the big-endian PAROSC */
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#define get_8(x) (*(u_int8_t*)(x))
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static inline u_int16_t get_16(const unsigned char *x)
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{
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return (x[1] << 8) | x[0];
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}
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static inline u_int32_t get_32(const unsigned char *x)
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{
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return (x[3] << 24) | (x[2] << 16) | (x[1] << 8) | x[0];
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}
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static inline u_int32_t get_24(const unsigned char *x)
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{
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return (x[2] << 24) | (x[1] << 16) | (x[0] << 8);
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}
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static void print_eisa_id(char *s, u_int32_t id)
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{
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char vendor[4];
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int rev;
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int device;
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rev = id & 0xff;
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id >>= 8;
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device = id & 0xff;
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id >>= 8;
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vendor[3] = '\0';
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vendor[2] = '@' + (id & 0x1f);
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id >>= 5;
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vendor[1] = '@' + (id & 0x1f);
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id >>= 5;
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vendor[0] = '@' + (id & 0x1f);
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id >>= 5;
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sprintf(s, "%s%02X%02X", vendor, device, rev);
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}
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static int configure_memory(const unsigned char *buf,
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struct resource *mem_parent,
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char *name)
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{
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int len;
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u_int8_t c;
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int i;
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struct resource *res;
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len=0;
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for (i=0;i<HPEE_MEMORY_MAX_ENT;i++) {
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c = get_8(buf+len);
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if (NULL != (res = kmalloc(sizeof(struct resource), GFP_KERNEL))) {
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int result;
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res->name = name;
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res->start = mem_parent->start + get_24(buf+len+2);
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res->end = res->start + get_16(buf+len+5)*1024;
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res->flags = IORESOURCE_MEM;
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printk("memory %lx-%lx ", res->start, res->end);
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result = request_resource(mem_parent, res);
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if (result < 0) {
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printk("\n" KERN_ERR "EISA Enumerator: failed to claim EISA Bus address space!\n");
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return result;
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}
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}
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len+=7;
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if (!(c & HPEE_MEMORY_MORE)) {
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break;
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}
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}
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return len;
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}
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static int configure_irq(const unsigned char *buf)
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{
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int len;
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u_int8_t c;
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int i;
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len=0;
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for (i=0;i<HPEE_IRQ_MAX_ENT;i++) {
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c = get_8(buf+len);
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printk("IRQ %d ", c & HPEE_IRQ_CHANNEL_MASK);
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if (c & HPEE_IRQ_TRIG_LEVEL) {
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eisa_make_irq_level(c & HPEE_IRQ_CHANNEL_MASK);
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} else {
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eisa_make_irq_edge(c & HPEE_IRQ_CHANNEL_MASK);
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}
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len+=2;
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/* hpux seems to allow for
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* two bytes of irq data but only defines one of
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* them, I think */
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if (!(c & HPEE_IRQ_MORE)) {
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break;
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}
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}
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return len;
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}
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static int configure_dma(const unsigned char *buf)
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{
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int len;
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u_int8_t c;
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int i;
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len=0;
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for (i=0;i<HPEE_DMA_MAX_ENT;i++) {
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c = get_8(buf+len);
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printk("DMA %d ", c&HPEE_DMA_CHANNEL_MASK);
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/* fixme: maybe initialize the dma channel withthe timing ? */
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len+=2;
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if (!(c & HPEE_DMA_MORE)) {
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break;
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}
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}
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return len;
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}
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static int configure_port(const unsigned char *buf, struct resource *io_parent,
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char *board)
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{
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int len;
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u_int8_t c;
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int i;
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struct resource *res;
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int result;
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len=0;
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for (i=0;i<HPEE_PORT_MAX_ENT;i++) {
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c = get_8(buf+len);
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if (NULL != (res = kmalloc(sizeof(struct resource), GFP_KERNEL))) {
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res->name = board;
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res->start = get_16(buf+len+1);
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res->end = get_16(buf+len+1)+(c&HPEE_PORT_SIZE_MASK)+1;
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res->flags = IORESOURCE_IO;
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printk("ioports %lx-%lx ", res->start, res->end);
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result = request_resource(io_parent, res);
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if (result < 0) {
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printk("\n" KERN_ERR "EISA Enumerator: failed to claim EISA Bus address space!\n");
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return result;
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}
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}
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len+=3;
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if (!(c & HPEE_PORT_MORE)) {
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break;
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}
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}
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return len;
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}
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/* byte 1 and 2 is the port number to write
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* and at byte 3 the value to write starts.
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* I assume that there are and- and or- masks
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* here when HPEE_PORT_INIT_MASK is set but I have
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* not yet encountered this. */
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static int configure_port_init(const unsigned char *buf)
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{
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int len=0;
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u_int8_t c;
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while (len<HPEE_PORT_INIT_MAX_LEN) {
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int s=0;
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c = get_8(buf+len);
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switch (c & HPEE_PORT_INIT_WIDTH_MASK) {
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case HPEE_PORT_INIT_WIDTH_BYTE:
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s=1;
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if (c & HPEE_PORT_INIT_MASK) {
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printk("\n" KERN_WARNING "port_init: unverified mask attribute\n");
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outb((inb(get_16(buf+len+1) &
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get_8(buf+len+3)) |
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get_8(buf+len+4)), get_16(buf+len+1));
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} else {
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outb(get_8(buf+len+3), get_16(buf+len+1));
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}
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break;
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case HPEE_PORT_INIT_WIDTH_WORD:
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s=2;
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if (c & HPEE_PORT_INIT_MASK) {
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printk(KERN_WARNING "port_init: unverified mask attribute\n");
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outw((inw(get_16(buf+len+1)) &
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get_16(buf+len+3)) |
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get_16(buf+len+5),
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get_16(buf+len+1));
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} else {
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outw(cpu_to_le16(get_16(buf+len+3)), get_16(buf+len+1));
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}
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break;
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case HPEE_PORT_INIT_WIDTH_DWORD:
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s=4;
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if (c & HPEE_PORT_INIT_MASK) {
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printk("\n" KERN_WARNING "port_init: unverified mask attribute\n");
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outl((inl(get_16(buf+len+1) &
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get_32(buf+len+3)) |
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get_32(buf+len+7)), get_16(buf+len+1));
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} else {
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outl(cpu_to_le32(get_32(buf+len+3)), get_16(buf+len+1));
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}
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break;
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default:
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printk("\n" KERN_ERR "Invalid port init word %02x\n", c);
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return 0;
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}
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if (c & HPEE_PORT_INIT_MASK) {
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s*=2;
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}
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len+=s+3;
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if (!(c & HPEE_PORT_INIT_MORE)) {
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break;
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}
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}
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return len;
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}
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static int configure_choise(const unsigned char *buf, u_int8_t *info)
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{
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int len;
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/* theis record contain the value of the functions
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* configuration choises and an info byte which
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* describes which other records to expect in this
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* function */
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len = get_8(buf);
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*info=get_8(buf+len+1);
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return len+2;
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}
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static int configure_type_string(const unsigned char *buf)
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{
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int len;
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/* just skip past the type field */
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len = get_8(buf);
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if (len > 80) {
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printk("\n" KERN_ERR "eisa_enumerator: type info field too long (%d, max is 80)\n", len);
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}
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return 1+len;
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}
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static int configure_function(const unsigned char *buf, int *more)
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{
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/* the init field seems to be a two-byte field
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* which is non-zero if there are an other function following
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* I think it is the length of the function def
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*/
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*more = get_16(buf);
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return 2;
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}
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static int parse_slot_config(int slot,
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const unsigned char *buf,
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struct eeprom_eisa_slot_info *es,
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struct resource *io_parent,
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struct resource *mem_parent)
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{
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int res=0;
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int function_len;
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unsigned int pos=0;
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unsigned int maxlen;
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int num_func=0;
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u_int8_t flags;
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int p0;
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char *board;
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int id_string_used=0;
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if (NULL == (board = kmalloc(8, GFP_KERNEL))) {
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return -1;
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}
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print_eisa_id(board, es->eisa_slot_id);
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printk(KERN_INFO "EISA slot %d: %s %s ",
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slot, board, es->flags&HPEE_FLAG_BOARD_IS_ISA ? "ISA" : "EISA");
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maxlen = es->config_data_length < HPEE_MAX_LENGTH ?
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es->config_data_length : HPEE_MAX_LENGTH;
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while ((pos < maxlen) && (num_func <= es->num_functions)) {
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pos+=configure_function(buf+pos, &function_len);
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if (!function_len) {
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break;
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}
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num_func++;
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p0 = pos;
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pos += configure_choise(buf+pos, &flags);
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if (flags & HPEE_FUNCTION_INFO_F_DISABLED) {
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/* function disabled, skip silently */
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pos = p0 + function_len;
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continue;
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}
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if (flags & HPEE_FUNCTION_INFO_CFG_FREE_FORM) {
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/* I have no idea how to handle this */
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printk("function %d have free-form confgiuration, skipping ",
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num_func);
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pos = p0 + function_len;
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continue;
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}
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/* the ordering of the sections need
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* more investigation.
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* Currently I think that memory comaed before IRQ
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* I assume the order is LSB to MSB in the
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* info flags
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* eg type, memory, irq, dma, port, HPEE_PORT_init
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*/
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if (flags & HPEE_FUNCTION_INFO_HAVE_TYPE) {
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pos += configure_type_string(buf+pos);
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}
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if (flags & HPEE_FUNCTION_INFO_HAVE_MEMORY) {
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id_string_used=1;
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pos += configure_memory(buf+pos, mem_parent, board);
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}
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if (flags & HPEE_FUNCTION_INFO_HAVE_IRQ) {
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pos += configure_irq(buf+pos);
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}
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if (flags & HPEE_FUNCTION_INFO_HAVE_DMA) {
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pos += configure_dma(buf+pos);
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}
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if (flags & HPEE_FUNCTION_INFO_HAVE_PORT) {
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id_string_used=1;
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pos += configure_port(buf+pos, io_parent, board);
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}
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if (flags & HPEE_FUNCTION_INFO_HAVE_PORT_INIT) {
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pos += configure_port_init(buf+pos);
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}
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if (p0 + function_len < pos) {
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printk("\n" KERN_ERR "eisa_enumerator: function %d length mis-match "
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"got %d, expected %d\n",
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num_func, pos-p0, function_len);
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res=-1;
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break;
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}
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pos = p0 + function_len;
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}
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printk("\n");
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if (!id_string_used) {
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kfree(board);
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}
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if (pos != es->config_data_length) {
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printk(KERN_ERR "eisa_enumerator: config data length mis-match got %d, expected %d\n",
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pos, es->config_data_length);
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res=-1;
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}
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if (num_func != es->num_functions) {
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printk(KERN_ERR "eisa_enumerator: number of functions mis-match got %d, expected %d\n",
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num_func, es->num_functions);
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res=-2;
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}
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return res;
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}
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static int init_slot(int slot, struct eeprom_eisa_slot_info *es)
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{
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unsigned int id;
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char id_string[8];
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if (!(es->slot_info&HPEE_SLOT_INFO_NO_READID)) {
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/* try to read the id of the board in the slot */
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id = le32_to_cpu(inl(SLOT2PORT(slot)+EPI));
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if (0xffffffff == id) {
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/* Maybe we didn't expect a card to be here... */
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if (es->eisa_slot_id == 0xffffffff)
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return -1;
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/* this board is not here or it does not
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* support readid
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*/
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printk(KERN_ERR "EISA slot %d a configured board was not detected (",
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slot);
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print_eisa_id(id_string, es->eisa_slot_id);
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printk(" expected %s)\n", id_string);
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return -1;
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}
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if (es->eisa_slot_id != id) {
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print_eisa_id(id_string, id);
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printk(KERN_ERR "EISA slot %d id mis-match: got %s",
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slot, id_string);
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print_eisa_id(id_string, es->eisa_slot_id);
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printk(" expected %s \n", id_string);
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return -1;
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}
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}
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/* now: we need to enable the board if
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* it supports enabling and run through
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* the port init sction if present
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* and finally record any interrupt polarity
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*/
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if (es->slot_features & HPEE_SLOT_FEATURES_ENABLE) {
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/* enable board */
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outb(0x01| inb(SLOT2PORT(slot)+EPI+4),
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SLOT2PORT(slot)+EPI+4);
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}
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return 0;
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}
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int eisa_enumerator(unsigned long eeprom_addr,
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struct resource *io_parent, struct resource *mem_parent)
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{
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int i;
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struct eeprom_header *eh;
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static char eeprom_buf[HPEE_MAX_LENGTH];
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for (i=0; i < HPEE_MAX_LENGTH; i++) {
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eeprom_buf[i] = gsc_readb(eeprom_addr+i);
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}
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printk(KERN_INFO "Enumerating EISA bus\n");
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eh = (struct eeprom_header*)(eeprom_buf);
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for (i=0;i<eh->num_slots;i++) {
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struct eeprom_eisa_slot_info *es;
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es = (struct eeprom_eisa_slot_info*)
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(&eeprom_buf[HPEE_SLOT_INFO(i)]);
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if (-1==init_slot(i+1, es)) {
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continue;
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}
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if (es->config_data_offset < HPEE_MAX_LENGTH) {
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if (parse_slot_config(i+1, &eeprom_buf[es->config_data_offset],
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es, io_parent, mem_parent)) {
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return -1;
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}
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} else {
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printk (KERN_WARNING "EISA EEPROM offset 0x%x out of range\n",es->config_data_offset);
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return -1;
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}
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}
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return eh->num_slots;
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}
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