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ba1ffd74df
Due to bad management of the descriptors, when use ptp4l, kernel panics as shown below: ----------------------------------------------------------- Unable to handle kernel NULL pointer dereference at virtual address 000001ac ... Internal error: Oops: 17 [#1] SMP ARM ... Hardware name: STi SoC with Flattened Device Tree task: c0c05e80 task.stack: c0c00000 PC is at dwmac4_wrback_get_tx_timestamp_status+0x0/0xc LR is at stmmac_tx_clean+0x2f8/0x4d4 ----------------------------------------------------------- In case of GMAC4 the extended descriptor pointers were used for getting the timestamp. These are NULL for this HW, and the normal ones must be used. The PTP also had problems on this chip due to the bad register management and issues on the algo adopted to setup the PTP and getting the timestamp values from the descriptors. Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Acked-by: Rayagond Kokatanur <rayagond@vayavyalabs.com> Acked-by: Alexandre TORGUE <alexandre.torgue@st.com> Acked-by: Richard Cochran <richardcochran@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
177 lines
4.5 KiB
C
177 lines
4.5 KiB
C
/*******************************************************************************
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Copyright (C) 2013 Vayavya Labs Pvt Ltd
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This implements all the API for managing HW timestamp & PTP.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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version 2, as published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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more details.
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You should have received a copy of the GNU General Public License along with
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this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
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The full GNU General Public License is included in this distribution in
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the file called "COPYING".
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Author: Rayagond Kokatanur <rayagond@vayavyalabs.com>
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Author: Giuseppe Cavallaro <peppe.cavallaro@st.com>
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*******************************************************************************/
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#include <linux/io.h>
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#include <linux/delay.h>
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#include "common.h"
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#include "stmmac_ptp.h"
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static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data)
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{
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writel(data, ioaddr + PTP_TCR);
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}
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static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr,
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u32 ptp_clock, int gmac4)
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{
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u32 value = readl(ioaddr + PTP_TCR);
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unsigned long data;
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/* For GMAC3.x, 4.x versions, convert the ptp_clock to nano second
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* formula = (1/ptp_clock) * 1000000000
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* where ptp_clock is 50MHz if fine method is used to update system
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*/
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if (value & PTP_TCR_TSCFUPDT)
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data = (1000000000ULL / 50000000);
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else
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data = (1000000000ULL / ptp_clock);
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/* 0.465ns accuracy */
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if (!(value & PTP_TCR_TSCTRLSSR))
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data = (data * 1000) / 465;
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data &= PTP_SSIR_SSINC_MASK;
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if (gmac4)
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data = data << GMAC4_PTP_SSIR_SSINC_SHIFT;
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writel(data, ioaddr + PTP_SSIR);
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return data;
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}
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static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec)
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{
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int limit;
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u32 value;
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writel(sec, ioaddr + PTP_STSUR);
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writel(nsec, ioaddr + PTP_STNSUR);
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/* issue command to initialize the system time value */
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value = readl(ioaddr + PTP_TCR);
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value |= PTP_TCR_TSINIT;
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writel(value, ioaddr + PTP_TCR);
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/* wait for present system time initialize to complete */
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limit = 10;
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while (limit--) {
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if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSINIT))
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break;
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mdelay(10);
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}
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if (limit < 0)
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return -EBUSY;
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return 0;
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}
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static int stmmac_config_addend(void __iomem *ioaddr, u32 addend)
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{
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u32 value;
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int limit;
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writel(addend, ioaddr + PTP_TAR);
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/* issue command to update the addend value */
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value = readl(ioaddr + PTP_TCR);
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value |= PTP_TCR_TSADDREG;
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writel(value, ioaddr + PTP_TCR);
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/* wait for present addend update to complete */
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limit = 10;
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while (limit--) {
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if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSADDREG))
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break;
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mdelay(10);
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}
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if (limit < 0)
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return -EBUSY;
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return 0;
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}
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static int stmmac_adjust_systime(void __iomem *ioaddr, u32 sec, u32 nsec,
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int add_sub, int gmac4)
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{
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u32 value;
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int limit;
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if (add_sub) {
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/* If the new sec value needs to be subtracted with
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* the system time, then MAC_STSUR reg should be
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* programmed with (2^32 – <new_sec_value>)
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*/
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if (gmac4)
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sec = (100000000ULL - sec);
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value = readl(ioaddr + PTP_TCR);
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if (value & PTP_TCR_TSCTRLSSR)
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nsec = (PTP_DIGITAL_ROLLOVER_MODE - nsec);
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else
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nsec = (PTP_BINARY_ROLLOVER_MODE - nsec);
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}
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writel(sec, ioaddr + PTP_STSUR);
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value = (add_sub << PTP_STNSUR_ADDSUB_SHIFT) | nsec;
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writel(value, ioaddr + PTP_STNSUR);
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/* issue command to initialize the system time value */
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value = readl(ioaddr + PTP_TCR);
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value |= PTP_TCR_TSUPDT;
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writel(value, ioaddr + PTP_TCR);
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/* wait for present system time adjust/update to complete */
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limit = 10;
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while (limit--) {
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if (!(readl(ioaddr + PTP_TCR) & PTP_TCR_TSUPDT))
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break;
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mdelay(10);
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}
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if (limit < 0)
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return -EBUSY;
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return 0;
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}
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static u64 stmmac_get_systime(void __iomem *ioaddr)
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{
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u64 ns;
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/* Get the TSSS value */
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ns = readl(ioaddr + PTP_STNSR);
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/* Get the TSS and convert sec time value to nanosecond */
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ns += readl(ioaddr + PTP_STSR) * 1000000000ULL;
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return ns;
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}
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const struct stmmac_hwtimestamp stmmac_ptp = {
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.config_hw_tstamping = stmmac_config_hw_tstamping,
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.init_systime = stmmac_init_systime,
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.config_sub_second_increment = stmmac_config_sub_second_increment,
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.config_addend = stmmac_config_addend,
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.adjust_systime = stmmac_adjust_systime,
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.get_systime = stmmac_get_systime,
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};
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