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8b5d8c0d71
These new structs will hold the sleep voltage levels (omap_vc_params) and voltage processor min / max voltages (omap_vp_params.) Previously these were part of the PMIC struct, but they do not really belong there, as they are OMAP chip specific, not PMIC specific parameters. voltdm code is also changed to use the new structs. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Kevin Hilman <khilman@ti.com>
136 lines
4.5 KiB
C
136 lines
4.5 KiB
C
/*
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* OMAP3/4 Voltage Processor (VP) structure and macro definitions
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*
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* Copyright (C) 2007, 2010 Texas Instruments, Inc.
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* Rajendra Nayak <rnayak@ti.com>
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* Lesly A M <x0080970@ti.com>
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* Thara Gopinath <thara@ti.com>
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*
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* Copyright (C) 2008, 2011 Nokia Corporation
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* Kalle Jokiniemi
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*/
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#ifndef __ARCH_ARM_MACH_OMAP2_VP_H
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#define __ARCH_ARM_MACH_OMAP2_VP_H
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#include <linux/kernel.h>
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struct voltagedomain;
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/*
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* Voltage Processor (VP) identifiers
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*/
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#define OMAP3_VP_VDD_MPU_ID 0
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#define OMAP3_VP_VDD_CORE_ID 1
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#define OMAP4_VP_VDD_CORE_ID 0
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#define OMAP4_VP_VDD_IVA_ID 1
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#define OMAP4_VP_VDD_MPU_ID 2
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/* XXX document */
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#define VP_IDLE_TIMEOUT 200
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#define VP_TRANXDONE_TIMEOUT 300
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/**
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* struct omap_vp_ops - per-VP operations
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* @check_txdone: check for VP transaction done
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* @clear_txdone: clear VP transaction done status
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*/
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struct omap_vp_ops {
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u32 (*check_txdone)(u8 vp_id);
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void (*clear_txdone)(u8 vp_id);
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};
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/**
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* struct omap_vp_common - register data common to all VDDs
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* @vpconfig_erroroffset_mask: ERROROFFSET bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_errorgain_mask: ERRORGAIN bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_initvoltage_mask: INITVOLTAGE bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_timeouten: TIMEOUT bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_initvdd: INITVDD bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_forceupdate: FORCEUPDATE bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_vpenable: VPENABLE bitmask in the PRM_VP*_CONFIG reg
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* @vpconfig_erroroffset_shift: ERROROFFSET field shift in PRM_VP*_CONFIG reg
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* @vpconfig_errorgain_shift: ERRORGAIN field shift in PRM_VP*_CONFIG reg
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* @vpconfig_initvoltage_shift: INITVOLTAGE field shift in PRM_VP*_CONFIG reg
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* @vstepmin_stepmin_shift: VSTEPMIN field shift in the PRM_VP*_VSTEPMIN reg
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* @vstepmin_smpswaittimemin_shift: SMPSWAITTIMEMIN field shift in PRM_VP*_VSTEPMIN reg
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* @vstepmax_stepmax_shift: VSTEPMAX field shift in the PRM_VP*_VSTEPMAX reg
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* @vstepmax_smpswaittimemax_shift: SMPSWAITTIMEMAX field shift in PRM_VP*_VSTEPMAX reg
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* @vlimitto_vddmin_shift: VDDMIN field shift in PRM_VP*_VLIMITTO reg
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* @vlimitto_vddmax_shift: VDDMAX field shift in PRM_VP*_VLIMITTO reg
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* @vlimitto_timeout_shift: TIMEOUT field shift in PRM_VP*_VLIMITTO reg
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* @vpvoltage_mask: VPVOLTAGE field mask in PRM_VP*_VOLTAGE reg
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*/
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struct omap_vp_common {
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u32 vpconfig_erroroffset_mask;
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u32 vpconfig_errorgain_mask;
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u32 vpconfig_initvoltage_mask;
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u8 vpconfig_timeouten;
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u8 vpconfig_initvdd;
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u8 vpconfig_forceupdate;
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u8 vpconfig_vpenable;
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u8 vstepmin_stepmin_shift;
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u8 vstepmin_smpswaittimemin_shift;
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u8 vstepmax_stepmax_shift;
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u8 vstepmax_smpswaittimemax_shift;
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u8 vlimitto_vddmin_shift;
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u8 vlimitto_vddmax_shift;
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u8 vlimitto_timeout_shift;
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u8 vpvoltage_mask;
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const struct omap_vp_ops *ops;
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};
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/**
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* struct omap_vp_instance - VP register offsets (per-VDD)
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* @common: pointer to struct omap_vp_common * for this SoC
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* @vpconfig: PRM_VP*_CONFIG reg offset from PRM start
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* @vstepmin: PRM_VP*_VSTEPMIN reg offset from PRM start
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* @vlimitto: PRM_VP*_VLIMITTO reg offset from PRM start
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* @vstatus: PRM_VP*_VSTATUS reg offset from PRM start
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* @voltage: PRM_VP*_VOLTAGE reg offset from PRM start
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* @id: Unique identifier for VP instance.
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* @enabled: flag to keep track of whether vp is enabled or not
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*
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* XXX vp_common is probably not needed since it is per-SoC
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*/
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struct omap_vp_instance {
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const struct omap_vp_common *common;
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u8 vpconfig;
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u8 vstepmin;
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u8 vstepmax;
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u8 vlimitto;
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u8 vstatus;
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u8 voltage;
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u8 id;
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bool enabled;
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};
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extern struct omap_vp_instance omap3_vp_mpu;
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extern struct omap_vp_instance omap3_vp_core;
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extern struct omap_vp_instance omap4_vp_mpu;
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extern struct omap_vp_instance omap4_vp_iva;
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extern struct omap_vp_instance omap4_vp_core;
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extern struct omap_vp_param omap3_mpu_vp_data;
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extern struct omap_vp_param omap3_core_vp_data;
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extern struct omap_vp_param omap4_mpu_vp_data;
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extern struct omap_vp_param omap4_iva_vp_data;
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extern struct omap_vp_param omap4_core_vp_data;
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void omap_vp_init(struct voltagedomain *voltdm);
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void omap_vp_enable(struct voltagedomain *voltdm);
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void omap_vp_disable(struct voltagedomain *voltdm);
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int omap_vp_forceupdate_scale(struct voltagedomain *voltdm,
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unsigned long target_volt);
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int omap_vp_update_errorgain(struct voltagedomain *voltdm,
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unsigned long target_volt);
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#endif
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