mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-27 14:43:58 +08:00
df80442d1e
Theis resolves lots of simple conflicts between the omap cleanup and the mach/memory.h removal series. Conflicts: arch/arm/mach-imx/mach-cpuimx27.c arch/arm/mach-omap1/board-ams-delta.c arch/arm/mach-omap1/board-generic.c arch/arm/mach-omap1/board-h2.c arch/arm/mach-omap1/board-h3.c arch/arm/mach-omap1/board-nokia770.c arch/arm/mach-omap1/board-osk.c arch/arm/mach-omap1/board-palmte.c arch/arm/mach-omap1/board-palmtt.c arch/arm/mach-omap1/board-palmz71.c arch/arm/mach-omap1/board-sx1.c arch/arm/mach-omap1/board-voiceblue.c arch/arm/mach-omap1/io.c arch/arm/mach-omap2/board-generic.c arch/arm/mach-omap2/io.c arch/arm/plat-omap/io.c Signed-off-by: Arnd Bergmann <arnd@arndb.de>
650 lines
18 KiB
C
650 lines
18 KiB
C
/*
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* CompuLab CM-T35/CM-T3730 modules support
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*
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* Copyright (C) 2009-2011 CompuLab, Ltd.
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* Authors: Mike Rapoport <mike@compulab.co.il>
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* Igor Grinberg <grinberg@compulab.co.il>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/input.h>
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#include <linux/input/matrix_keypad.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/i2c/at24.h>
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#include <linux/i2c/twl.h>
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#include <linux/regulator/machine.h>
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#include <linux/mmc/host.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/tdo24m.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <plat/board.h>
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#include <plat/common.h>
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#include <plat/nand.h>
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#include <plat/gpmc.h>
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#include <plat/usb.h>
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#include <video/omapdss.h>
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#include <video/omap-panel-generic-dpi.h>
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#include <video/omap-panel-dvi.h>
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#include <plat/mcspi.h>
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#include <mach/hardware.h>
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#include "mux.h"
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#include "sdram-micron-mt46h32m32lf-6.h"
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#include "hsmmc.h"
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#include "common-board-devices.h"
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#define CM_T35_GPIO_PENDOWN 57
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#define CM_T35_SMSC911X_CS 5
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#define CM_T35_SMSC911X_GPIO 163
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#define SB_T35_SMSC911X_CS 4
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#define SB_T35_SMSC911X_GPIO 65
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#if defined(CONFIG_SMSC911X) || defined(CONFIG_SMSC911X_MODULE)
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#include <linux/smsc911x.h>
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#include <plat/gpmc-smsc911x.h>
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static struct omap_smsc911x_platform_data cm_t35_smsc911x_cfg = {
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.id = 0,
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.cs = CM_T35_SMSC911X_CS,
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.gpio_irq = CM_T35_SMSC911X_GPIO,
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.gpio_reset = -EINVAL,
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.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
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};
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static struct omap_smsc911x_platform_data sb_t35_smsc911x_cfg = {
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.id = 1,
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.cs = SB_T35_SMSC911X_CS,
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.gpio_irq = SB_T35_SMSC911X_GPIO,
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.gpio_reset = -EINVAL,
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.flags = SMSC911X_USE_32BIT | SMSC911X_SAVE_MAC_ADDRESS,
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};
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static void __init cm_t35_init_ethernet(void)
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{
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gpmc_smsc911x_init(&cm_t35_smsc911x_cfg);
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gpmc_smsc911x_init(&sb_t35_smsc911x_cfg);
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}
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#else
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static inline void __init cm_t35_init_ethernet(void) { return; }
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#endif
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#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
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#include <linux/leds.h>
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static struct gpio_led cm_t35_leds[] = {
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[0] = {
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.gpio = 186,
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.name = "cm-t35:green",
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.default_trigger = "heartbeat",
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.active_low = 0,
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},
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};
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static struct gpio_led_platform_data cm_t35_led_pdata = {
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.num_leds = ARRAY_SIZE(cm_t35_leds),
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.leds = cm_t35_leds,
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};
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static struct platform_device cm_t35_led_device = {
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.name = "leds-gpio",
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.id = -1,
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.dev = {
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.platform_data = &cm_t35_led_pdata,
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},
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};
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static void __init cm_t35_init_led(void)
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{
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platform_device_register(&cm_t35_led_device);
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}
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#else
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static inline void cm_t35_init_led(void) {}
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#endif
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#if defined(CONFIG_MTD_NAND_OMAP2) || defined(CONFIG_MTD_NAND_OMAP2_MODULE)
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#include <linux/mtd/mtd.h>
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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static struct mtd_partition cm_t35_nand_partitions[] = {
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{
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.name = "xloader",
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.offset = 0, /* Offset = 0x00000 */
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.size = 4 * NAND_BLOCK_SIZE,
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.mask_flags = MTD_WRITEABLE
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},
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{
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.name = "uboot",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x80000 */
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.size = 15 * NAND_BLOCK_SIZE,
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},
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{
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.name = "uboot environment",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x260000 */
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.size = 2 * NAND_BLOCK_SIZE,
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},
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{
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.name = "linux",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x2A0000 */
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.size = 32 * NAND_BLOCK_SIZE,
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},
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{
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.name = "rootfs",
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.offset = MTDPART_OFS_APPEND, /* Offset = 0x6A0000 */
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.size = MTDPART_SIZ_FULL,
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},
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};
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static struct omap_nand_platform_data cm_t35_nand_data = {
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.parts = cm_t35_nand_partitions,
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.nr_parts = ARRAY_SIZE(cm_t35_nand_partitions),
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.cs = 0,
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};
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static void __init cm_t35_init_nand(void)
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{
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if (gpmc_nand_init(&cm_t35_nand_data) < 0)
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pr_err("CM-T35: Unable to register NAND device\n");
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}
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#else
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static inline void cm_t35_init_nand(void) {}
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#endif
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#define CM_T35_LCD_EN_GPIO 157
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#define CM_T35_LCD_BL_GPIO 58
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#define CM_T35_DVI_EN_GPIO 54
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static int lcd_enabled;
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static int dvi_enabled;
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static int cm_t35_panel_enable_lcd(struct omap_dss_device *dssdev)
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{
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if (dvi_enabled) {
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printk(KERN_ERR "cannot enable LCD, DVI is enabled\n");
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return -EINVAL;
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}
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gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
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gpio_set_value(CM_T35_LCD_BL_GPIO, 1);
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lcd_enabled = 1;
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return 0;
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}
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static void cm_t35_panel_disable_lcd(struct omap_dss_device *dssdev)
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{
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lcd_enabled = 0;
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gpio_set_value(CM_T35_LCD_BL_GPIO, 0);
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gpio_set_value(CM_T35_LCD_EN_GPIO, 0);
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}
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static int cm_t35_panel_enable_dvi(struct omap_dss_device *dssdev)
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{
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if (lcd_enabled) {
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printk(KERN_ERR "cannot enable DVI, LCD is enabled\n");
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return -EINVAL;
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}
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gpio_set_value(CM_T35_DVI_EN_GPIO, 0);
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dvi_enabled = 1;
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return 0;
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}
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static void cm_t35_panel_disable_dvi(struct omap_dss_device *dssdev)
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{
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gpio_set_value(CM_T35_DVI_EN_GPIO, 1);
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dvi_enabled = 0;
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}
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static int cm_t35_panel_enable_tv(struct omap_dss_device *dssdev)
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{
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return 0;
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}
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static void cm_t35_panel_disable_tv(struct omap_dss_device *dssdev)
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{
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}
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static struct panel_generic_dpi_data lcd_panel = {
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.name = "toppoly_tdo35s",
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.platform_enable = cm_t35_panel_enable_lcd,
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.platform_disable = cm_t35_panel_disable_lcd,
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};
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static struct omap_dss_device cm_t35_lcd_device = {
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.name = "lcd",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "generic_dpi_panel",
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.data = &lcd_panel,
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.phy.dpi.data_lines = 18,
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};
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static struct panel_dvi_platform_data dvi_panel = {
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.platform_enable = cm_t35_panel_enable_dvi,
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.platform_disable = cm_t35_panel_disable_dvi,
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};
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static struct omap_dss_device cm_t35_dvi_device = {
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.name = "dvi",
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.type = OMAP_DISPLAY_TYPE_DPI,
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.driver_name = "dvi",
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.data = &dvi_panel,
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.phy.dpi.data_lines = 24,
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};
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static struct omap_dss_device cm_t35_tv_device = {
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.name = "tv",
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.driver_name = "venc",
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.type = OMAP_DISPLAY_TYPE_VENC,
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.phy.venc.type = OMAP_DSS_VENC_TYPE_SVIDEO,
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.platform_enable = cm_t35_panel_enable_tv,
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.platform_disable = cm_t35_panel_disable_tv,
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};
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static struct omap_dss_device *cm_t35_dss_devices[] = {
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&cm_t35_lcd_device,
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&cm_t35_dvi_device,
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&cm_t35_tv_device,
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};
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static struct omap_dss_board_info cm_t35_dss_data = {
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.num_devices = ARRAY_SIZE(cm_t35_dss_devices),
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.devices = cm_t35_dss_devices,
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.default_device = &cm_t35_dvi_device,
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};
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static struct omap2_mcspi_device_config tdo24m_mcspi_config = {
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.turbo_mode = 0,
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.single_channel = 1, /* 0: slave, 1: master */
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};
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static struct tdo24m_platform_data tdo24m_config = {
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.model = TDO35S,
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};
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static struct spi_board_info cm_t35_lcd_spi_board_info[] __initdata = {
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{
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.modalias = "tdo24m",
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.bus_num = 4,
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.chip_select = 0,
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.max_speed_hz = 1000000,
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.controller_data = &tdo24m_mcspi_config,
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.platform_data = &tdo24m_config,
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},
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};
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static struct gpio cm_t35_dss_gpios[] __initdata = {
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{ CM_T35_LCD_EN_GPIO, GPIOF_OUT_INIT_LOW, "lcd enable" },
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{ CM_T35_LCD_BL_GPIO, GPIOF_OUT_INIT_LOW, "lcd bl enable" },
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{ CM_T35_DVI_EN_GPIO, GPIOF_OUT_INIT_HIGH, "dvi enable" },
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};
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static void __init cm_t35_init_display(void)
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{
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int err;
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spi_register_board_info(cm_t35_lcd_spi_board_info,
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ARRAY_SIZE(cm_t35_lcd_spi_board_info));
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err = gpio_request_array(cm_t35_dss_gpios,
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ARRAY_SIZE(cm_t35_dss_gpios));
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if (err) {
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pr_err("CM-T35: failed to request DSS control GPIOs\n");
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return;
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}
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gpio_export(CM_T35_LCD_EN_GPIO, 0);
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gpio_export(CM_T35_LCD_BL_GPIO, 0);
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gpio_export(CM_T35_DVI_EN_GPIO, 0);
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msleep(50);
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gpio_set_value(CM_T35_LCD_EN_GPIO, 1);
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err = omap_display_init(&cm_t35_dss_data);
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if (err) {
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pr_err("CM-T35: failed to register DSS device\n");
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gpio_free_array(cm_t35_dss_gpios, ARRAY_SIZE(cm_t35_dss_gpios));
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}
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}
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static struct regulator_consumer_supply cm_t35_vmmc1_supply[] = {
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REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
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};
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static struct regulator_consumer_supply cm_t35_vsim_supply[] = {
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REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
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};
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static struct regulator_consumer_supply cm_t35_vdvi_supply[] = {
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REGULATOR_SUPPLY("vdvi", "omapdss"),
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};
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/* VMMC1 for MMC1 pins CMD, CLK, DAT0..DAT3 (20 mA, plus card == max 220 mA) */
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static struct regulator_init_data cm_t35_vmmc1 = {
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.constraints = {
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.min_uV = 1850000,
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.max_uV = 3150000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(cm_t35_vmmc1_supply),
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.consumer_supplies = cm_t35_vmmc1_supply,
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};
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/* VSIM for MMC1 pins DAT4..DAT7 (2 mA, plus card == max 50 mA) */
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static struct regulator_init_data cm_t35_vsim = {
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.constraints = {
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.min_uV = 1800000,
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.max_uV = 3000000,
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.valid_modes_mask = REGULATOR_MODE_NORMAL
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| REGULATOR_MODE_STANDBY,
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.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE
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| REGULATOR_CHANGE_MODE
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| REGULATOR_CHANGE_STATUS,
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},
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.num_consumer_supplies = ARRAY_SIZE(cm_t35_vsim_supply),
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.consumer_supplies = cm_t35_vsim_supply,
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};
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static uint32_t cm_t35_keymap[] = {
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KEY(0, 0, KEY_A), KEY(0, 1, KEY_B), KEY(0, 2, KEY_LEFT),
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KEY(1, 0, KEY_UP), KEY(1, 1, KEY_ENTER), KEY(1, 2, KEY_DOWN),
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KEY(2, 0, KEY_RIGHT), KEY(2, 1, KEY_C), KEY(2, 2, KEY_D),
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};
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static struct matrix_keymap_data cm_t35_keymap_data = {
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.keymap = cm_t35_keymap,
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.keymap_size = ARRAY_SIZE(cm_t35_keymap),
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};
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static struct twl4030_keypad_data cm_t35_kp_data = {
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.keymap_data = &cm_t35_keymap_data,
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.rows = 3,
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.cols = 3,
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.rep = 1,
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};
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static struct omap2_hsmmc_info mmc[] = {
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{
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.mmc = 1,
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.caps = MMC_CAP_4_BIT_DATA,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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},
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{
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.mmc = 2,
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.caps = MMC_CAP_4_BIT_DATA,
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.transceiver = 1,
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.gpio_cd = -EINVAL,
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.gpio_wp = -EINVAL,
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.ocr_mask = 0x00100000, /* 3.3V */
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},
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{} /* Terminator */
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};
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static struct usbhs_omap_board_data usbhs_bdata __initdata = {
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.port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
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.port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
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.phy_reset = true,
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.reset_gpio_port[0] = OMAP_MAX_GPIO_LINES + 6,
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.reset_gpio_port[1] = OMAP_MAX_GPIO_LINES + 7,
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.reset_gpio_port[2] = -EINVAL
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};
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static int cm_t35_twl_gpio_setup(struct device *dev, unsigned gpio,
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unsigned ngpio)
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{
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int wlan_rst = gpio + 2;
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if (gpio_request_one(wlan_rst, GPIOF_OUT_INIT_HIGH, "WLAN RST") == 0) {
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gpio_export(wlan_rst, 0);
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udelay(10);
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gpio_set_value_cansleep(wlan_rst, 0);
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udelay(10);
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gpio_set_value_cansleep(wlan_rst, 1);
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} else {
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pr_err("CM-T35: could not obtain gpio for WiFi reset\n");
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}
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/* gpio + 0 is "mmc0_cd" (input/IRQ) */
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mmc[0].gpio_cd = gpio + 0;
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omap2_hsmmc_init(mmc);
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return 0;
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}
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static struct twl4030_gpio_platform_data cm_t35_gpio_data = {
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.gpio_base = OMAP_MAX_GPIO_LINES,
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.irq_base = TWL4030_GPIO_IRQ_BASE,
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.irq_end = TWL4030_GPIO_IRQ_END,
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.setup = cm_t35_twl_gpio_setup,
|
|
};
|
|
|
|
static struct twl4030_platform_data cm_t35_twldata = {
|
|
/* platform_data for children goes here */
|
|
.keypad = &cm_t35_kp_data,
|
|
.gpio = &cm_t35_gpio_data,
|
|
.vmmc1 = &cm_t35_vmmc1,
|
|
.vsim = &cm_t35_vsim,
|
|
};
|
|
|
|
static void __init cm_t35_init_i2c(void)
|
|
{
|
|
omap3_pmic_get_config(&cm_t35_twldata, TWL_COMMON_PDATA_USB,
|
|
TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
|
|
|
|
cm_t35_twldata.vpll2->constraints.name = "VDVI";
|
|
cm_t35_twldata.vpll2->num_consumer_supplies =
|
|
ARRAY_SIZE(cm_t35_vdvi_supply);
|
|
cm_t35_twldata.vpll2->consumer_supplies = cm_t35_vdvi_supply;
|
|
|
|
omap3_pmic_init("tps65930", &cm_t35_twldata);
|
|
}
|
|
|
|
#ifdef CONFIG_OMAP_MUX
|
|
static struct omap_board_mux board_mux[] __initdata = {
|
|
/* nCS and IRQ for CM-T35 ethernet */
|
|
OMAP3_MUX(GPMC_NCS5, OMAP_MUX_MODE0),
|
|
OMAP3_MUX(UART3_CTS_RCTX, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
|
|
|
|
/* nCS and IRQ for SB-T35 ethernet */
|
|
OMAP3_MUX(GPMC_NCS4, OMAP_MUX_MODE0),
|
|
OMAP3_MUX(GPMC_WAIT3, OMAP_MUX_MODE4 | OMAP_PIN_INPUT_PULLUP),
|
|
|
|
/* PENDOWN GPIO */
|
|
OMAP3_MUX(GPMC_NCS6, OMAP_MUX_MODE4 | OMAP_PIN_INPUT),
|
|
|
|
/* mUSB */
|
|
OMAP3_MUX(HSUSB0_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_STP, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(HSUSB0_DIR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_NXT, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA1, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA2, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA3, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA4, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA5, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(HSUSB0_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* MMC 2 */
|
|
OMAP3_MUX(SDMMC2_DAT4, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(SDMMC2_DAT5, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(SDMMC2_DAT6, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(SDMMC2_DAT7, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
|
|
/* McSPI 1 */
|
|
OMAP3_MUX(MCSPI1_CLK, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI1_SIMO, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI1_SOMI, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCSPI1_CS0, OMAP_MUX_MODE0 | OMAP_PIN_INPUT_PULLDOWN),
|
|
|
|
/* McSPI 4 */
|
|
OMAP3_MUX(MCBSP1_CLKR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP1_DX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP1_DR, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP1_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT_PULLUP),
|
|
|
|
/* McBSP 2 */
|
|
OMAP3_MUX(MCBSP2_FSX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP2_CLKX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP2_DR, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(MCBSP2_DX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
|
|
/* serial ports */
|
|
OMAP3_MUX(MCBSP3_CLKX, OMAP_MUX_MODE1 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(MCBSP3_FSX, OMAP_MUX_MODE1 | OMAP_PIN_INPUT),
|
|
OMAP3_MUX(UART1_TX, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(UART1_RX, OMAP_MUX_MODE0 | OMAP_PIN_INPUT),
|
|
|
|
/* common DSS */
|
|
OMAP3_MUX(DSS_PCLK, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_HSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_VSYNC, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_ACBIAS, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA6, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA7, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA8, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA9, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA10, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA11, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA12, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA13, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA14, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA15, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA16, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(DSS_DATA17, OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT),
|
|
|
|
/* display controls */
|
|
OMAP3_MUX(MCBSP1_FSR, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(GPMC_NCS7, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
OMAP3_MUX(GPMC_NCS3, OMAP_MUX_MODE4 | OMAP_PIN_OUTPUT),
|
|
|
|
/* TPS IRQ */
|
|
OMAP3_MUX(SYS_NIRQ, OMAP_MUX_MODE0 | OMAP_WAKEUP_EN | \
|
|
OMAP_PIN_INPUT_PULLUP),
|
|
|
|
{ .reg_offset = OMAP_MUX_TERMINATOR },
|
|
};
|
|
|
|
static void __init cm_t3x_common_dss_mux_init(int mux_mode)
|
|
{
|
|
omap_mux_init_signal("dss_data18", mux_mode);
|
|
omap_mux_init_signal("dss_data19", mux_mode);
|
|
omap_mux_init_signal("dss_data20", mux_mode);
|
|
omap_mux_init_signal("dss_data21", mux_mode);
|
|
omap_mux_init_signal("dss_data22", mux_mode);
|
|
omap_mux_init_signal("dss_data23", mux_mode);
|
|
}
|
|
|
|
static void __init cm_t35_init_mux(void)
|
|
{
|
|
omap_mux_init_signal("gpio_70", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("gpio_71", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("gpio_72", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("gpio_73", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("gpio_74", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("gpio_75", OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
cm_t3x_common_dss_mux_init(OMAP_MUX_MODE0 | OMAP_PIN_OUTPUT);
|
|
}
|
|
|
|
static void __init cm_t3730_init_mux(void)
|
|
{
|
|
omap_mux_init_signal("sys_boot0", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("sys_boot1", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("sys_boot3", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("sys_boot4", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("sys_boot5", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
omap_mux_init_signal("sys_boot6", OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
cm_t3x_common_dss_mux_init(OMAP_MUX_MODE3 | OMAP_PIN_OUTPUT);
|
|
}
|
|
#else
|
|
static inline void cm_t35_init_mux(void) {}
|
|
static inline void cm_t3730_init_mux(void) {}
|
|
#endif
|
|
|
|
static struct omap_board_config_kernel cm_t35_config[] __initdata = {
|
|
};
|
|
|
|
static void __init cm_t3x_common_init(void)
|
|
{
|
|
omap_board_config = cm_t35_config;
|
|
omap_board_config_size = ARRAY_SIZE(cm_t35_config);
|
|
omap3_mux_init(board_mux, OMAP_PACKAGE_CUS);
|
|
omap_serial_init();
|
|
omap_sdrc_init(mt46h32m32lf6_sdrc_params,
|
|
mt46h32m32lf6_sdrc_params);
|
|
cm_t35_init_i2c();
|
|
omap_ads7846_init(1, CM_T35_GPIO_PENDOWN, 0, NULL);
|
|
cm_t35_init_ethernet();
|
|
cm_t35_init_led();
|
|
cm_t35_init_display();
|
|
|
|
usb_musb_init(NULL);
|
|
usbhs_init(&usbhs_bdata);
|
|
}
|
|
|
|
static void __init cm_t35_init(void)
|
|
{
|
|
cm_t3x_common_init();
|
|
cm_t35_init_mux();
|
|
cm_t35_init_nand();
|
|
}
|
|
|
|
static void __init cm_t3730_init(void)
|
|
{
|
|
cm_t3x_common_init();
|
|
cm_t3730_init_mux();
|
|
}
|
|
|
|
MACHINE_START(CM_T35, "Compulab CM-T35")
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap35xx_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.init_machine = cm_t35_init,
|
|
.timer = &omap3_timer,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(CM_T3730, "Compulab CM-T3730")
|
|
.atag_offset = 0x100,
|
|
.reserve = omap_reserve,
|
|
.map_io = omap3_map_io,
|
|
.init_early = omap3630_init_early,
|
|
.init_irq = omap3_init_irq,
|
|
.init_machine = cm_t3730_init,
|
|
.timer = &omap3_timer,
|
|
MACHINE_END
|