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a36e9a1c5f
Implements OF support and convert to of_mm_gpio. By attaching hardware latches to the External Bus Unit (EBU) on Lantiq SoC, it is possible to create output only gpios. This driver configures a special memory address, which when written to, outputs 16 bit to the latches. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Acked-by: Grant Likely <grant.likely@secretlab.ca> Patchwork: https://patchwork.linux-mips.org/patch/3840/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
39 lines
1.2 KiB
Plaintext
39 lines
1.2 KiB
Plaintext
Lantiq SoC External Bus memory mapped GPIO controller
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By attaching hardware latches to the EBU it is possible to create output
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only gpios. This driver configures a special memory address, which when
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written to outputs 16 bit to the latches.
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The node describing the memory mapped GPIOs needs to be a child of the node
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describing the "lantiq,localbus".
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Required properties:
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- compatible : Should be "lantiq,gpio-mm-lantiq"
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- reg : Address and length of the register set for the device
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- #gpio-cells : Should be two. The first cell is the pin number and
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the second cell is used to specify optional parameters (currently
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unused).
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- gpio-controller : Marks the device node as a gpio controller.
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Optional properties:
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- lantiq,shadow : The default value that we shall assume as already set on the
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shift register cascade.
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Example:
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localbus@0 {
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#address-cells = <2>;
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#size-cells = <1>;
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ranges = <0 0 0x0 0x3ffffff /* addrsel0 */
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1 0 0x4000000 0x4000010>; /* addsel1 */
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compatible = "lantiq,localbus", "simple-bus";
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gpio_mm0: gpio@4000000 {
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compatible = "lantiq,gpio-mm";
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reg = <1 0x0 0x10>;
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gpio-controller;
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#gpio-cells = <2>;
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lantiq,shadow = <0x77f>
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};
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}
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