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ee4df23634
Apart from the clocks and resets, the PMU hardware also controls power to peripherals that are on separate power islands. On MMP2, that's the GC860 GPU and the SSPA audio interface, while on MMP3 also the camera interface is on a separate island, along with the pair of GC2000 and GC300 GPUs and the SSPA. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Link: https://lkml.kernel.org/r/20200519224151.2074597-12-lkundrak@v3.sk Signed-off-by: Stephen Boyd <sboyd@kernel.org>
116 lines
2.5 KiB
C
116 lines
2.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* MMP PMU power island support
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*
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* Copyright (C) 2020 Lubomir Rintel <lkundrak@v3.sk>
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*/
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#include <linux/pm_domain.h>
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#include <linux/slab.h>
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#include <linux/io.h>
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#include "clk.h"
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#define to_mmp_pm_domain(genpd) container_of(genpd, struct mmp_pm_domain, genpd)
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struct mmp_pm_domain {
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struct generic_pm_domain genpd;
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void __iomem *reg;
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spinlock_t *lock;
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u32 power_on;
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u32 reset;
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u32 clock_enable;
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unsigned int flags;
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};
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static int mmp_pm_domain_power_on(struct generic_pm_domain *genpd)
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{
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struct mmp_pm_domain *pm_domain = to_mmp_pm_domain(genpd);
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unsigned long flags = 0;
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u32 val;
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if (pm_domain->lock)
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spin_lock_irqsave(pm_domain->lock, flags);
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val = readl(pm_domain->reg);
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/* Turn on the power island */
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val |= pm_domain->power_on;
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writel(val, pm_domain->reg);
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/* Disable isolation */
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val |= 0x100;
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writel(val, pm_domain->reg);
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/* Some blocks need to be reset after a power up */
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if (pm_domain->reset || pm_domain->clock_enable) {
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u32 after_power_on = val;
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val &= ~pm_domain->reset;
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writel(val, pm_domain->reg);
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val |= pm_domain->clock_enable;
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writel(val, pm_domain->reg);
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val |= pm_domain->reset;
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writel(val, pm_domain->reg);
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writel(after_power_on, pm_domain->reg);
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}
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if (pm_domain->lock)
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spin_unlock_irqrestore(pm_domain->lock, flags);
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return 0;
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}
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static int mmp_pm_domain_power_off(struct generic_pm_domain *genpd)
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{
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struct mmp_pm_domain *pm_domain = to_mmp_pm_domain(genpd);
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unsigned long flags = 0;
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u32 val;
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if (pm_domain->flags & MMP_PM_DOMAIN_NO_DISABLE)
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return 0;
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if (pm_domain->lock)
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spin_lock_irqsave(pm_domain->lock, flags);
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/* Turn off and isolate the the power island. */
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val = readl(pm_domain->reg);
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val &= ~pm_domain->power_on;
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val &= ~0x100;
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writel(val, pm_domain->reg);
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if (pm_domain->lock)
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spin_unlock_irqrestore(pm_domain->lock, flags);
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return 0;
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}
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struct generic_pm_domain *mmp_pm_domain_register(const char *name,
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void __iomem *reg,
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u32 power_on, u32 reset, u32 clock_enable,
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unsigned int flags, spinlock_t *lock)
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{
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struct mmp_pm_domain *pm_domain;
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pm_domain = kzalloc(sizeof(*pm_domain), GFP_KERNEL);
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if (!pm_domain)
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return ERR_PTR(-ENOMEM);
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pm_domain->reg = reg;
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pm_domain->power_on = power_on;
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pm_domain->reset = reset;
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pm_domain->clock_enable = clock_enable;
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pm_domain->flags = flags;
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pm_domain->lock = lock;
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pm_genpd_init(&pm_domain->genpd, NULL, true);
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pm_domain->genpd.name = name;
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pm_domain->genpd.power_on = mmp_pm_domain_power_on;
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pm_domain->genpd.power_off = mmp_pm_domain_power_off;
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return &pm_domain->genpd;
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}
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