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https://github.com/edk2-porting/linux-next.git
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d5afa7e905
Revert the changes made by commit fdffbafb [Lots of FPU bug fixes from Kjeld Borch Egevang.] to `ieee754sp_nanxcpt' and `ieee754dp_nanxcpt' sNaN quieting handlers and their callers so that sNaN processing is done within the handlers againg. Pass the sNaN causing an IEEE 754 invalid operation exception down to the relevant handler. Pass the sNaN in `fs' where two sNaNs are supplied to a binary operation. Set the Invalid Operation FCSR exception bits in the quieting handlers rather than at their call sites throughout. Make the handlers exclusive for sNaN processing. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9688/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
81 lines
2.0 KiB
C
81 lines
2.0 KiB
C
/* IEEE754 floating point arithmetic
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* single precision
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*/
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/*
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* MIPS floating point support
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* Copyright (C) 1994-2000 Algorithmics Ltd.
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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*/
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#include "ieee754sp.h"
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#include "ieee754dp.h"
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static inline union ieee754sp ieee754sp_nan_fdp(int xs, u64 xm)
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{
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return buildsp(xs, SP_EMAX + 1 + SP_EBIAS,
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xm >> (DP_FBITS - SP_FBITS));
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}
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union ieee754sp ieee754sp_fdp(union ieee754dp x)
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{
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u32 rm;
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COMPXDP;
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union ieee754sp nan;
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EXPLODEXDP;
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ieee754_clearcx();
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FLUSHXDP;
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switch (xc) {
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case IEEE754_CLASS_SNAN:
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return ieee754sp_nanxcpt(ieee754sp_nan_fdp(xs, xm));
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case IEEE754_CLASS_QNAN:
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nan = ieee754sp_nan_fdp(xs, xm);
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if (!ieee754sp_isnan(nan))
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nan = ieee754sp_indef();
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return nan;
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case IEEE754_CLASS_INF:
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return ieee754sp_inf(xs);
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case IEEE754_CLASS_ZERO:
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return ieee754sp_zero(xs);
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case IEEE754_CLASS_DNORM:
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/* can't possibly be sp representable */
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ieee754_setcx(IEEE754_UNDERFLOW);
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ieee754_setcx(IEEE754_INEXACT);
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if ((ieee754_csr.rm == FPU_CSR_RU && !xs) ||
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(ieee754_csr.rm == FPU_CSR_RD && xs))
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return ieee754sp_mind(xs);
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return ieee754sp_zero(xs);
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case IEEE754_CLASS_NORM:
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break;
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}
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/*
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* Convert from DP_FBITS to SP_FBITS+3 with sticky right shift.
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*/
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rm = (xm >> (DP_FBITS - (SP_FBITS + 3))) |
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((xm << (64 - (DP_FBITS - (SP_FBITS + 3)))) != 0);
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return ieee754sp_format(xs, xe, rm);
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}
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