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d4c56f97ff
Pass a full set of flags to drivers' per-operation 'prep' routines. Currently the only flag passed is DMA_PREP_INTERRUPT. The expectation is that arch-specific async_tx_find_channel() implementations can exploit this capability to find the best channel for an operation. Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-by: Shannon Nelson <shannon.nelson@intel.com> Reviewed-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
446 lines
14 KiB
C
446 lines
14 KiB
C
/*
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* Copyright(c) 2004 - 2006 Intel Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the Free
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* Software Foundation; either version 2 of the License, or (at your option)
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* any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59
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* Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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* The full GNU General Public License is included in this distribution in the
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* file called COPYING.
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*/
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#ifndef DMAENGINE_H
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#define DMAENGINE_H
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#include <linux/device.h>
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#include <linux/uio.h>
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#include <linux/kref.h>
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#include <linux/completion.h>
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#include <linux/rcupdate.h>
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#include <linux/dma-mapping.h>
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/**
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* enum dma_state - resource PNP/power management state
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* @DMA_RESOURCE_SUSPEND: DMA device going into low power state
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* @DMA_RESOURCE_RESUME: DMA device returning to full power
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* @DMA_RESOURCE_AVAILABLE: DMA device available to the system
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* @DMA_RESOURCE_REMOVED: DMA device removed from the system
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*/
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enum dma_state {
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DMA_RESOURCE_SUSPEND,
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DMA_RESOURCE_RESUME,
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DMA_RESOURCE_AVAILABLE,
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DMA_RESOURCE_REMOVED,
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};
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/**
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* enum dma_state_client - state of the channel in the client
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* @DMA_ACK: client would like to use, or was using this channel
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* @DMA_DUP: client has already seen this channel, or is not using this channel
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* @DMA_NAK: client does not want to see any more channels
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*/
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enum dma_state_client {
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DMA_ACK,
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DMA_DUP,
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DMA_NAK,
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};
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/**
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* typedef dma_cookie_t - an opaque DMA cookie
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*
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* if dma_cookie_t is >0 it's a DMA request cookie, <0 it's an error code
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*/
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typedef s32 dma_cookie_t;
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#define dma_submit_error(cookie) ((cookie) < 0 ? 1 : 0)
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/**
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* enum dma_status - DMA transaction status
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* @DMA_SUCCESS: transaction completed successfully
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* @DMA_IN_PROGRESS: transaction not yet processed
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* @DMA_ERROR: transaction failed
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*/
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enum dma_status {
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DMA_SUCCESS,
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DMA_IN_PROGRESS,
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DMA_ERROR,
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};
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/**
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* enum dma_transaction_type - DMA transaction types/indexes
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*/
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enum dma_transaction_type {
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DMA_MEMCPY,
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DMA_XOR,
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DMA_PQ_XOR,
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DMA_DUAL_XOR,
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DMA_PQ_UPDATE,
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DMA_ZERO_SUM,
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DMA_PQ_ZERO_SUM,
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DMA_MEMSET,
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DMA_MEMCPY_CRC32C,
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DMA_INTERRUPT,
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};
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/* last transaction type for creation of the capabilities mask */
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#define DMA_TX_TYPE_END (DMA_INTERRUPT + 1)
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/**
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* enum dma_prep_flags - DMA flags to augment operation preparation
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* @DMA_PREP_INTERRUPT - trigger an interrupt (callback) upon completion of
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* this transaction
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*/
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enum dma_prep_flags {
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DMA_PREP_INTERRUPT = (1 << 0),
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};
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/**
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* dma_cap_mask_t - capabilities bitmap modeled after cpumask_t.
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* See linux/cpumask.h
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*/
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typedef struct { DECLARE_BITMAP(bits, DMA_TX_TYPE_END); } dma_cap_mask_t;
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/**
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* struct dma_chan_percpu - the per-CPU part of struct dma_chan
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* @refcount: local_t used for open-coded "bigref" counting
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* @memcpy_count: transaction counter
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* @bytes_transferred: byte counter
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*/
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struct dma_chan_percpu {
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local_t refcount;
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/* stats */
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unsigned long memcpy_count;
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unsigned long bytes_transferred;
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};
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/**
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* struct dma_chan - devices supply DMA channels, clients use them
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* @device: ptr to the dma device who supplies this channel, always !%NULL
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* @cookie: last cookie value returned to client
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* @chan_id: channel ID for sysfs
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* @class_dev: class device for sysfs
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* @refcount: kref, used in "bigref" slow-mode
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* @slow_ref: indicates that the DMA channel is free
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* @rcu: the DMA channel's RCU head
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* @device_node: used to add this to the device chan list
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* @local: per-cpu pointer to a struct dma_chan_percpu
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*/
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struct dma_chan {
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struct dma_device *device;
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dma_cookie_t cookie;
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/* sysfs */
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int chan_id;
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struct device dev;
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struct kref refcount;
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int slow_ref;
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struct rcu_head rcu;
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struct list_head device_node;
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struct dma_chan_percpu *local;
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};
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#define to_dma_chan(p) container_of(p, struct dma_chan, dev)
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void dma_chan_cleanup(struct kref *kref);
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static inline void dma_chan_get(struct dma_chan *chan)
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{
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if (unlikely(chan->slow_ref))
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kref_get(&chan->refcount);
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else {
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local_inc(&(per_cpu_ptr(chan->local, get_cpu())->refcount));
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put_cpu();
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}
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}
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static inline void dma_chan_put(struct dma_chan *chan)
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{
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if (unlikely(chan->slow_ref))
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kref_put(&chan->refcount, dma_chan_cleanup);
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else {
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local_dec(&(per_cpu_ptr(chan->local, get_cpu())->refcount));
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put_cpu();
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}
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}
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/*
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* typedef dma_event_callback - function pointer to a DMA event callback
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* For each channel added to the system this routine is called for each client.
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* If the client would like to use the channel it returns '1' to signal (ack)
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* the dmaengine core to take out a reference on the channel and its
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* corresponding device. A client must not 'ack' an available channel more
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* than once. When a channel is removed all clients are notified. If a client
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* is using the channel it must 'ack' the removal. A client must not 'ack' a
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* removed channel more than once.
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* @client - 'this' pointer for the client context
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* @chan - channel to be acted upon
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* @state - available or removed
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*/
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struct dma_client;
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typedef enum dma_state_client (*dma_event_callback) (struct dma_client *client,
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struct dma_chan *chan, enum dma_state state);
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/**
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* struct dma_client - info on the entity making use of DMA services
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* @event_callback: func ptr to call when something happens
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* @cap_mask: only return channels that satisfy the requested capabilities
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* a value of zero corresponds to any capability
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* @global_node: list_head for global dma_client_list
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*/
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struct dma_client {
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dma_event_callback event_callback;
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dma_cap_mask_t cap_mask;
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struct list_head global_node;
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};
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typedef void (*dma_async_tx_callback)(void *dma_async_param);
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/**
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* struct dma_async_tx_descriptor - async transaction descriptor
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* ---dma generic offload fields---
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* @cookie: tracking cookie for this transaction, set to -EBUSY if
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* this tx is sitting on a dependency list
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* @ack: the descriptor can not be reused until the client acknowledges
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* receipt, i.e. has has a chance to establish any dependency chains
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* @phys: physical address of the descriptor
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* @tx_list: driver common field for operations that require multiple
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* descriptors
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* @chan: target channel for this operation
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* @tx_submit: set the prepared descriptor(s) to be executed by the engine
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* @callback: routine to call after this operation is complete
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* @callback_param: general parameter to pass to the callback routine
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* ---async_tx api specific fields---
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* @depend_list: at completion this list of transactions are submitted
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* @depend_node: allow this transaction to be executed after another
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* transaction has completed, possibly on another channel
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* @parent: pointer to the next level up in the dependency chain
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* @lock: protect the dependency list
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*/
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struct dma_async_tx_descriptor {
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dma_cookie_t cookie;
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int ack;
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dma_addr_t phys;
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struct list_head tx_list;
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struct dma_chan *chan;
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dma_cookie_t (*tx_submit)(struct dma_async_tx_descriptor *tx);
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dma_async_tx_callback callback;
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void *callback_param;
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struct list_head depend_list;
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struct list_head depend_node;
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struct dma_async_tx_descriptor *parent;
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spinlock_t lock;
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};
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/**
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* struct dma_device - info on the entity supplying DMA services
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* @chancnt: how many DMA channels are supported
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* @channels: the list of struct dma_chan
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* @global_node: list_head for global dma_device_list
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* @cap_mask: one or more dma_capability flags
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* @max_xor: maximum number of xor sources, 0 if no capability
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* @refcount: reference count
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* @done: IO completion struct
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* @dev_id: unique device ID
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* @dev: struct device reference for dma mapping api
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* @device_alloc_chan_resources: allocate resources and return the
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* number of allocated descriptors
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* @device_free_chan_resources: release DMA channel's resources
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* @device_prep_dma_memcpy: prepares a memcpy operation
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* @device_prep_dma_xor: prepares a xor operation
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* @device_prep_dma_zero_sum: prepares a zero_sum operation
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* @device_prep_dma_memset: prepares a memset operation
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* @device_prep_dma_interrupt: prepares an end of chain interrupt operation
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* @device_dependency_added: async_tx notifies the channel about new deps
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* @device_issue_pending: push pending transactions to hardware
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*/
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struct dma_device {
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unsigned int chancnt;
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struct list_head channels;
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struct list_head global_node;
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dma_cap_mask_t cap_mask;
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int max_xor;
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struct kref refcount;
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struct completion done;
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int dev_id;
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struct device *dev;
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int (*device_alloc_chan_resources)(struct dma_chan *chan);
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void (*device_free_chan_resources)(struct dma_chan *chan);
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struct dma_async_tx_descriptor *(*device_prep_dma_memcpy)(
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struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
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size_t len, unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_xor)(
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struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
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unsigned int src_cnt, size_t len, unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_zero_sum)(
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struct dma_chan *chan, dma_addr_t *src, unsigned int src_cnt,
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size_t len, u32 *result, unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_memset)(
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struct dma_chan *chan, dma_addr_t dest, int value, size_t len,
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unsigned long flags);
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struct dma_async_tx_descriptor *(*device_prep_dma_interrupt)(
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struct dma_chan *chan);
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void (*device_dependency_added)(struct dma_chan *chan);
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enum dma_status (*device_is_tx_complete)(struct dma_chan *chan,
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dma_cookie_t cookie, dma_cookie_t *last,
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dma_cookie_t *used);
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void (*device_issue_pending)(struct dma_chan *chan);
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};
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/* --- public DMA engine API --- */
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void dma_async_client_register(struct dma_client *client);
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void dma_async_client_unregister(struct dma_client *client);
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void dma_async_client_chan_request(struct dma_client *client);
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dma_cookie_t dma_async_memcpy_buf_to_buf(struct dma_chan *chan,
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void *dest, void *src, size_t len);
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dma_cookie_t dma_async_memcpy_buf_to_pg(struct dma_chan *chan,
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struct page *page, unsigned int offset, void *kdata, size_t len);
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dma_cookie_t dma_async_memcpy_pg_to_pg(struct dma_chan *chan,
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struct page *dest_pg, unsigned int dest_off, struct page *src_pg,
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unsigned int src_off, size_t len);
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void dma_async_tx_descriptor_init(struct dma_async_tx_descriptor *tx,
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struct dma_chan *chan);
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static inline void
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async_tx_ack(struct dma_async_tx_descriptor *tx)
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{
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tx->ack = 1;
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}
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#define first_dma_cap(mask) __first_dma_cap(&(mask))
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static inline int __first_dma_cap(const dma_cap_mask_t *srcp)
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{
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return min_t(int, DMA_TX_TYPE_END,
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find_first_bit(srcp->bits, DMA_TX_TYPE_END));
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}
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#define next_dma_cap(n, mask) __next_dma_cap((n), &(mask))
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static inline int __next_dma_cap(int n, const dma_cap_mask_t *srcp)
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{
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return min_t(int, DMA_TX_TYPE_END,
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find_next_bit(srcp->bits, DMA_TX_TYPE_END, n+1));
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}
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#define dma_cap_set(tx, mask) __dma_cap_set((tx), &(mask))
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static inline void
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__dma_cap_set(enum dma_transaction_type tx_type, dma_cap_mask_t *dstp)
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{
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set_bit(tx_type, dstp->bits);
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}
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#define dma_has_cap(tx, mask) __dma_has_cap((tx), &(mask))
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static inline int
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__dma_has_cap(enum dma_transaction_type tx_type, dma_cap_mask_t *srcp)
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{
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return test_bit(tx_type, srcp->bits);
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}
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#define for_each_dma_cap_mask(cap, mask) \
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for ((cap) = first_dma_cap(mask); \
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(cap) < DMA_TX_TYPE_END; \
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(cap) = next_dma_cap((cap), (mask)))
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/**
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* dma_async_issue_pending - flush pending transactions to HW
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* @chan: target DMA channel
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*
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* This allows drivers to push copies to HW in batches,
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* reducing MMIO writes where possible.
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*/
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static inline void dma_async_issue_pending(struct dma_chan *chan)
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{
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return chan->device->device_issue_pending(chan);
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}
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#define dma_async_memcpy_issue_pending(chan) dma_async_issue_pending(chan)
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/**
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* dma_async_is_tx_complete - poll for transaction completion
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* @chan: DMA channel
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* @cookie: transaction identifier to check status of
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* @last: returns last completed cookie, can be NULL
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* @used: returns last issued cookie, can be NULL
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*
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* If @last and @used are passed in, upon return they reflect the driver
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* internal state and can be used with dma_async_is_complete() to check
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* the status of multiple cookies without re-checking hardware state.
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*/
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static inline enum dma_status dma_async_is_tx_complete(struct dma_chan *chan,
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dma_cookie_t cookie, dma_cookie_t *last, dma_cookie_t *used)
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{
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return chan->device->device_is_tx_complete(chan, cookie, last, used);
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}
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#define dma_async_memcpy_complete(chan, cookie, last, used)\
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dma_async_is_tx_complete(chan, cookie, last, used)
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/**
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* dma_async_is_complete - test a cookie against chan state
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* @cookie: transaction identifier to test status of
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* @last_complete: last know completed transaction
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* @last_used: last cookie value handed out
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*
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* dma_async_is_complete() is used in dma_async_memcpy_complete()
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* the test logic is seperated for lightweight testing of multiple cookies
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*/
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static inline enum dma_status dma_async_is_complete(dma_cookie_t cookie,
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dma_cookie_t last_complete, dma_cookie_t last_used)
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{
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if (last_complete <= last_used) {
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if ((cookie <= last_complete) || (cookie > last_used))
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return DMA_SUCCESS;
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} else {
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if ((cookie <= last_complete) && (cookie > last_used))
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return DMA_SUCCESS;
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}
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return DMA_IN_PROGRESS;
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}
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enum dma_status dma_sync_wait(struct dma_chan *chan, dma_cookie_t cookie);
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/* --- DMA device --- */
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int dma_async_device_register(struct dma_device *device);
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void dma_async_device_unregister(struct dma_device *device);
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/* --- Helper iov-locking functions --- */
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struct dma_page_list {
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char *base_address;
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int nr_pages;
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struct page **pages;
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};
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struct dma_pinned_list {
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int nr_iovecs;
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struct dma_page_list page_list[0];
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};
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struct dma_pinned_list *dma_pin_iovec_pages(struct iovec *iov, size_t len);
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void dma_unpin_iovec_pages(struct dma_pinned_list* pinned_list);
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dma_cookie_t dma_memcpy_to_iovec(struct dma_chan *chan, struct iovec *iov,
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struct dma_pinned_list *pinned_list, unsigned char *kdata, size_t len);
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dma_cookie_t dma_memcpy_pg_to_iovec(struct dma_chan *chan, struct iovec *iov,
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struct dma_pinned_list *pinned_list, struct page *page,
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unsigned int offset, size_t len);
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#endif /* DMAENGINE_H */
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