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The HLCDC IP available in some Atmel SoCs (i.e. at91sam9x5, at91sam9n12 or sama5d3 families for instance) provides a PWM device. The DT bindings used for this PWM device is following the default 3 cells bindings described in Documentation/devicetree/bindings/pwm/pwm.txt. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
30 lines
908 B
Plaintext
30 lines
908 B
Plaintext
Device-Tree bindings for Atmel's HLCDC (High-end LCD Controller) PWM driver
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The Atmel HLCDC PWM is subdevice of the HLCDC MFD device.
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See ../mfd/atmel-hlcdc.txt for more details.
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Required properties:
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- compatible: value should be one of the following:
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"atmel,hlcdc-pwm"
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- pinctr-names: the pin control state names. Should contain "default".
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- pinctrl-0: should contain the pinctrl states described by pinctrl
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default.
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- #pwm-cells: should be set to 3. This PWM chip use the default 3 cells
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bindings defined in pwm.txt in this directory.
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Example:
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hlcdc: hlcdc@f0030000 {
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compatible = "atmel,sama5d3-hlcdc";
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reg = <0xf0030000 0x2000>;
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clocks = <&lcdc_clk>, <&lcdck>, <&clk32k>;
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clock-names = "periph_clk","sys_clk", "slow_clk";
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hlcdc_pwm: hlcdc-pwm {
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compatible = "atmel,hlcdc-pwm";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_lcd_pwm>;
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#pwm-cells = <3>;
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};
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};
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