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54d33c4c71
This patch provides MTD support for NAND flash devices on CM-x270 modules. Signed-off-by: Mike Rapoport <mike@compulab.co.il> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
268 lines
5.9 KiB
C
268 lines
5.9 KiB
C
/*
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* linux/drivers/mtd/nand/cmx270-nand.c
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*
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* Copyright (C) 2006 Compulab, Ltd.
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* Mike Rapoport <mike@compulab.co.il>
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*
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* Derived from drivers/mtd/nand/h1910.c
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* Copyright (C) 2002 Marius Gröger (mag@sysgo.de)
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* Copyright (c) 2001 Thomas Gleixner (gleixner@autronix.de)
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*
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Overview:
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* This is a device driver for the NAND flash device found on the
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* CM-X270 board.
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*/
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#include <linux/mtd/nand.h>
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#include <linux/mtd/partitions.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/arch/hardware.h>
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#include <asm/arch/pxa-regs.h>
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#define GPIO_NAND_CS (11)
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#define GPIO_NAND_RB (89)
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/* This macro needed to ensure in-order operation of GPIO and local
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* bus. Without both asm command and dummy uncached read there're
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* states when NAND access is broken. I've looked for such macro(s) in
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* include/asm-arm but found nothing approptiate.
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* dmac_clean_range is close, but is makes cache invalidation
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* unnecessary here and it cannot be used in module
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*/
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#define DRAIN_WB() \
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do { \
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unsigned char dummy; \
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asm volatile ("mcr p15, 0, r0, c7, c10, 4":::"r0"); \
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dummy=*((unsigned char*)UNCACHED_ADDR); \
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} while(0)
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/* MTD structure for CM-X270 board */
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static struct mtd_info *cmx270_nand_mtd;
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/* remaped IO address of the device */
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static void __iomem *cmx270_nand_io;
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/*
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* Define static partitions for flash device
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*/
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static struct mtd_partition partition_info[] = {
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[0] = {
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.name = "cmx270-0",
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.offset = 0,
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.size = MTDPART_SIZ_FULL
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}
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};
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#define NUM_PARTITIONS (ARRAY_SIZE(partition_info))
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const char *part_probes[] = { "cmdlinepart", NULL };
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static u_char cmx270_read_byte(struct mtd_info *mtd)
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{
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struct nand_chip *this = mtd->priv;
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return (readl(this->IO_ADDR_R) >> 16);
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}
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static void cmx270_write_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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int i;
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struct nand_chip *this = mtd->priv;
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for (i=0; i<len; i++)
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writel((*buf++ << 16), this->IO_ADDR_W);
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}
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static void cmx270_read_buf(struct mtd_info *mtd, u_char *buf, int len)
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{
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int i;
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struct nand_chip *this = mtd->priv;
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for (i=0; i<len; i++)
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*buf++ = readl(this->IO_ADDR_R) >> 16;
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}
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static int cmx270_verify_buf(struct mtd_info *mtd, const u_char *buf, int len)
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{
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int i;
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struct nand_chip *this = mtd->priv;
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for (i=0; i<len; i++)
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if (buf[i] != (u_char)(readl(this->IO_ADDR_R) >> 16))
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return -EFAULT;
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return 0;
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}
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static inline void nand_cs_on(void)
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{
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GPCR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
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}
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static void nand_cs_off(void)
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{
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DRAIN_WB();
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GPSR(GPIO_NAND_CS) = GPIO_bit(GPIO_NAND_CS);
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}
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/*
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* hardware specific access to control-lines
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*/
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static void cmx270_hwcontrol(struct mtd_info *mtd, int dat,
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unsigned int ctrl)
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{
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struct nand_chip* this = mtd->priv;
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unsigned int nandaddr = (unsigned int)this->IO_ADDR_W;
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DRAIN_WB();
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if (ctrl & NAND_CTRL_CHANGE) {
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if ( ctrl & NAND_ALE )
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nandaddr |= (1 << 3);
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else
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nandaddr &= ~(1 << 3);
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if ( ctrl & NAND_CLE )
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nandaddr |= (1 << 2);
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else
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nandaddr &= ~(1 << 2);
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if ( ctrl & NAND_NCE )
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nand_cs_on();
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else
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nand_cs_off();
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}
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DRAIN_WB();
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this->IO_ADDR_W = (void __iomem*)nandaddr;
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if (dat != NAND_CMD_NONE)
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writel((dat << 16), this->IO_ADDR_W);
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DRAIN_WB();
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}
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/*
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* read device ready pin
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*/
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static int cmx270_device_ready(struct mtd_info *mtd)
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{
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DRAIN_WB();
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return (GPLR(GPIO_NAND_RB) & GPIO_bit(GPIO_NAND_RB));
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}
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/*
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* Main initialization routine
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*/
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static int cmx270_init(void)
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{
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struct nand_chip *this;
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const char *part_type;
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struct mtd_partition *mtd_parts;
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int mtd_parts_nb = 0;
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int ret;
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/* Allocate memory for MTD device structure and private data */
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cmx270_nand_mtd = kzalloc(sizeof(struct mtd_info) +
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sizeof(struct nand_chip),
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GFP_KERNEL);
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if (!cmx270_nand_mtd) {
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printk("Unable to allocate CM-X270 NAND MTD device structure.\n");
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return -ENOMEM;
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}
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cmx270_nand_io = ioremap(PXA_CS1_PHYS, 12);
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if (!cmx270_nand_io) {
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printk("Unable to ioremap NAND device\n");
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ret = -EINVAL;
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goto err1;
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}
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/* Get pointer to private data */
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this = (struct nand_chip *)(&cmx270_nand_mtd[1]);
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/* Link the private data with the MTD structure */
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cmx270_nand_mtd->owner = THIS_MODULE;
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cmx270_nand_mtd->priv = this;
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/* insert callbacks */
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this->IO_ADDR_R = cmx270_nand_io;
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this->IO_ADDR_W = cmx270_nand_io;
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this->cmd_ctrl = cmx270_hwcontrol;
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this->dev_ready = cmx270_device_ready;
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/* 15 us command delay time */
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this->chip_delay = 20;
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this->ecc.mode = NAND_ECC_SOFT;
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/* read/write functions */
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this->read_byte = cmx270_read_byte;
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this->read_buf = cmx270_read_buf;
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this->write_buf = cmx270_write_buf;
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this->verify_buf = cmx270_verify_buf;
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/* Scan to find existence of the device */
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if (nand_scan (cmx270_nand_mtd, 1)) {
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printk(KERN_NOTICE "No NAND device\n");
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ret = -ENXIO;
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goto err2;
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}
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#ifdef CONFIG_MTD_CMDLINE_PARTS
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mtd_parts_nb = parse_mtd_partitions(cmx270_nand_mtd, part_probes,
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&mtd_parts, 0);
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if (mtd_parts_nb > 0)
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part_type = "command line";
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else
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mtd_parts_nb = 0;
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#endif
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if (!mtd_parts_nb) {
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mtd_parts = partition_info;
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mtd_parts_nb = NUM_PARTITIONS;
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part_type = "static";
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}
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/* Register the partitions */
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printk(KERN_NOTICE "Using %s partition definition\n", part_type);
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ret = add_mtd_partitions(cmx270_nand_mtd, mtd_parts, mtd_parts_nb);
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if (ret)
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goto err2;
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/* Return happy */
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return 0;
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err2:
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iounmap(cmx270_nand_io);
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err1:
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kfree(cmx270_nand_mtd);
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return ret;
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}
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module_init(cmx270_init);
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/*
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* Clean up routine
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*/
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static void cmx270_cleanup(void)
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{
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/* Release resources, unregister device */
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nand_release(cmx270_nand_mtd);
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iounmap(cmx270_nand_io);
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/* Free the MTD device structure */
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kfree (cmx270_nand_mtd);
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}
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module_exit(cmx270_cleanup);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Mike Rapoport <mike@compulab.co.il>");
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MODULE_DESCRIPTION("NAND flash driver for Compulab CM-X270 Module");
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