mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-25 05:34:00 +08:00
df0c382436
Since PMIC INT pin is a special pin of CPU, the status of PMIC INT pin needs to be cleared after PMIC IRQ occured. Now append the clear operation in irq chip handler. Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
18 lines
491 B
C
18 lines
491 B
C
#define ARRAY_AND_SIZE(x) (x), ARRAY_SIZE(x)
|
|
|
|
struct sys_timer;
|
|
|
|
extern void timer_init(int irq);
|
|
extern void mmp2_clear_pmic_int(void);
|
|
|
|
extern struct sys_timer pxa168_timer;
|
|
extern struct sys_timer pxa910_timer;
|
|
extern struct sys_timer mmp2_timer;
|
|
extern void __init pxa168_init_irq(void);
|
|
extern void __init pxa910_init_irq(void);
|
|
extern void __init mmp2_init_icu(void);
|
|
extern void __init mmp2_init_irq(void);
|
|
|
|
extern void __init icu_init_irq(void);
|
|
extern void __init pxa_map_io(void);
|