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f43521e952
When Tegra124 support was first merged the unit-addresses of all devices were listed with a "0," prefix to encode the reg property's second cell. It turns out that this notation is not correct, and the "," separator is only used to separate fields in the unit address (such as the device and function number in PCI devices), not individual cells for addresses with more than one cell. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Rob Herring <robh@kernel.org>
31 lines
1.2 KiB
Plaintext
31 lines
1.2 KiB
Plaintext
NVIDIA Tegra30 HDA controller
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Required properties:
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- compatible : For Tegra30, must contain "nvidia,tegra30-hda". Otherwise,
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must contain '"nvidia,<chip>-hda", "nvidia,tegra30-hda"', where <chip> is
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tegra114, tegra124, or tegra132.
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- reg : Should contain the HDA registers location and length.
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- interrupts : The interrupt from the HDA controller.
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- clocks : Must contain an entry for each required entry in clock-names.
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See ../clocks/clock-bindings.txt for details.
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- clock-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries: hda, hda2hdmi, hda2codec_2x
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Example:
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hda@70030000 {
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compatible = "nvidia,tegra124-hda", "nvidia,tegra30-hda";
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reg = <0x0 0x70030000 0x0 0x10000>;
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interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&tegra_car TEGRA124_CLK_HDA>,
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<&tegra_car TEGRA124_CLK_HDA2HDMI>,
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<&tegra_car TEGRA124_CLK_HDA2CODEC_2X>;
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clock-names = "hda", "hda2hdmi", "hda2codec_2x";
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resets = <&tegra_car 125>, /* hda */
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<&tegra_car 128>, /* hda2hdmi */
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<&tegra_car 111>; /* hda2codec_2x */
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reset-names = "hda", "hda2hdmi", "hda2codec_2x";
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};
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