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d524dac927
The device tree is used by more than just PowerPC. Make the documentation
directory available to all.
v2: reorganized files while moving to create arch and driver specific
directories.
Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
Acked-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
58 lines
2.2 KiB
Plaintext
58 lines
2.2 KiB
Plaintext
SPI (Serial Peripheral Interface) busses
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SPI busses can be described with a node for the SPI master device
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and a set of child nodes for each SPI slave on the bus. For this
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discussion, it is assumed that the system's SPI controller is in
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SPI master mode. This binding does not describe SPI controllers
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in slave mode.
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The SPI master node requires the following properties:
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- #address-cells - number of cells required to define a chip select
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address on the SPI bus.
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- #size-cells - should be zero.
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- compatible - name of SPI bus controller following generic names
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recommended practice.
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No other properties are required in the SPI bus node. It is assumed
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that a driver for an SPI bus device will understand that it is an SPI bus.
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However, the binding does not attempt to define the specific method for
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assigning chip select numbers. Since SPI chip select configuration is
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flexible and non-standardized, it is left out of this binding with the
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assumption that board specific platform code will be used to manage
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chip selects. Individual drivers can define additional properties to
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support describing the chip select layout.
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SPI slave nodes must be children of the SPI master node and can
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contain the following properties.
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- reg - (required) chip select address of device.
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- compatible - (required) name of SPI device following generic names
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recommended practice
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- spi-max-frequency - (required) Maximum SPI clocking speed of device in Hz
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- spi-cpol - (optional) Empty property indicating device requires
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inverse clock polarity (CPOL) mode
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- spi-cpha - (optional) Empty property indicating device requires
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shifted clock phase (CPHA) mode
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- spi-cs-high - (optional) Empty property indicating device requires
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chip select active high
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SPI example for an MPC5200 SPI bus:
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spi@f00 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
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reg = <0xf00 0x20>;
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interrupts = <2 13 0 2 14 0>;
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interrupt-parent = <&mpc5200_pic>;
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ethernet-switch@0 {
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compatible = "micrel,ks8995m";
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spi-max-frequency = <1000000>;
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reg = <0>;
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};
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codec@1 {
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compatible = "ti,tlv320aic26";
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spi-max-frequency = <100000>;
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reg = <1>;
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};
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};
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