Commits 4c09eed9 (net: fec: Enable imx6 enet checksum acceleration) and
baa70a5c (net: fec: enable pause frame to improve rx prefomance for 1G
network) introduced functionality into the FEC driver which is not
supported on MCF5272. The registers used to implement this functionality
do not exist on MCF5272. Since register defines for MCF5272 are separate
from register defines for other chips, building images for MCF5272 fails
as follows.
fec_main.c: In function 'fec_restart':
fec_main.c:520:8: error: 'FEC_RACC' undeclared (first use in this function)
fec_main.c:585:3: error: 'FEC_R_FIFO_RSEM' undeclared (first use in this function)
fec_main.c:586:3: error: 'FEC_R_FIFO_RSFL' undeclared (first use in this function)
fec_main.c:587:3: error: 'FEC_R_FIFO_RAEM' undeclared (first use in this function)
fec_main.c:588:3: error: 'FEC_R_FIFO_RAFL' undeclared (first use in this function)
fec_main.c:591:3: error: 'FEC_OPD' undeclared (first use in this function)
Adding the missing register defines is not an option, since the registers
do not exist on MCF5272. Disable the added functionality for MCF5272 builds.
Cc: Frank Li <Frank.Li@freescale.com>
Cc: Jim Baxter <jim_baxter@mentor.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Signed-off-by: David S. Miller <davem@davemloft.net>
d13919301d