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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-23 20:53:53 +08:00
linux-next/drivers/clk/renesas
Geert Uytterhoeven f2fb4fe623 clk: renesas: Zero init clk_init_data
As clk_core_populate_parent_map() checks clk_init_data.num_parents
first, and checks clk_init_data.parent_names[] before
clk_init_data.parent_data[] and clk_init_data.parent_hws[], leaving the
latter uninitialized doesn't do harm for now.  However, it is better to
play it safe, and initialize all clk_init_data structures to zeroes, to
avoid any current and future members containing uninitialized data.

Remove a few explicit zero initializers, which are now superfluous.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Link: https://lore.kernel.org/r/20210326105434.1574796-1-geert+renesas@glider.be
2021-03-30 09:58:27 +02:00
..
clk-div6.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
clk-div6.h We have two changes to the core framework this time around. The first being a 2017-11-17 20:04:24 -08:00
clk-emev2.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-mstp.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
clk-r8a73a4.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-r8a7740.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clk-r8a7778.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-r8a7779.c Merge branches 'clk-dt-name', 'clk-ti-of-node' and 'clk-sa' into clk-next 2018-10-18 15:33:52 -07:00
clk-rz.c remove ioremap_nocache and devm_ioremap_nocache 2020-01-06 09:45:59 +01:00
clk-sh73a0.c clk: renesas: sh73a0: Stop using __raw_*() I/O accessors 2020-12-10 08:34:01 +01:00
Kconfig clk: renesas: r8a779a0: Add SDHI support 2021-01-12 12:35:13 +01:00
Makefile clk: renesas: rcar-gen3: Factor out CPG library 2021-01-12 12:35:13 +01:00
r7s9210-cpg-mssr.c clk: renesas: cpg-mssr: Use enum clk_reg_layout instead of a boolean flag 2020-09-17 15:30:08 +02:00
r8a774a1-cpg-mssr.c clk: renesas: r8a774a1: Add RPC clocks 2020-12-10 08:34:01 +01:00
r8a774b1-cpg-mssr.c clk: renesas: r8a774b1: Add RPC clocks 2020-12-10 08:34:01 +01:00
r8a774c0-cpg-mssr.c clk: renesas: r8a774c0: Add RPC clocks 2020-12-10 08:34:01 +01:00
r8a774e1-cpg-mssr.c clk: renesas: cpg-mssr: Add r8a774e1 support 2020-07-13 10:36:33 +02:00
r8a779a0-cpg-mssr.c clk: renesas: r8a779a0: Add CMT clocks 2021-03-12 09:23:24 +01:00
r8a7742-cpg-mssr.c clk: renesas: r8a7742: Add clk entry for VSPR 2020-09-04 09:42:01 +02:00
r8a7743-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7745-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7790-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7791-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7792-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7794-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a7795-cpg-mssr.c clk: renesas: r8a7795: Add TMU clocks 2021-03-12 09:22:46 +01:00
r8a7796-cpg-mssr.c clk: renesas: r8a7796: Add TMU clocks 2020-12-28 10:45:16 +01:00
r8a77470-cpg-mssr.c clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r) 2020-09-04 09:42:01 +02:00
r8a77965-cpg-mssr.c clk: renesas: r8a77965: Add DAB clock 2021-03-08 10:30:02 +01:00
r8a77970-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77980-cpg-mssr.c clk: renesas: rcar-gen3: Mark RWDT clocks as critical 2020-06-22 16:53:49 +02:00
r8a77990-cpg-mssr.c clk: renesas: r8a77990: Add DAB clock 2021-03-08 10:30:02 +01:00
r8a77995-cpg-mssr.c clk: renesas: r8a77995: Add TMU clocks 2020-12-28 10:45:17 +01:00
r9a06g032-clocks.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
rcar-cpg-lib.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
rcar-cpg-lib.h clk: renesas: rcar-gen3: Factor out CPG library 2021-01-12 12:35:13 +01:00
rcar-gen2-cpg.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
rcar-gen2-cpg.h clk: renesas: rcar-gen2: Change multipliers and dividers to u8 2019-12-10 10:24:10 +01:00
rcar-gen3-cpg.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
rcar-gen3-cpg.h clk: renesas: r8a774c0: Add RPC clocks 2020-12-10 08:34:01 +01:00
rcar-usb2-clock-sel.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
renesas-cpg-mssr.c clk: renesas: Zero init clk_init_data 2021-03-30 09:58:27 +02:00
renesas-cpg-mssr.h clk: renesas: cpg-mssr: Add support for R-Car V3U 2020-09-17 15:32:25 +02:00