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b85a3ef4ac
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/* arch/arm/mach-zynq/include/mach/uncompress.h
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*
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* Copyright (C) 2011 Xilinx
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#ifndef __MACH_UNCOMPRESS_H__
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#define __MACH_UNCOMPRESS_H__
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#include <linux/io.h>
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#include <asm/processor.h>
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#include <mach/zynq_soc.h>
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#include <mach/uart.h>
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void arch_decomp_setup(void)
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{
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}
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static inline void flush(void)
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{
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/*
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* Wait while the FIFO is not empty
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*/
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while (!(__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
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UART_SR_TXEMPTY))
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cpu_relax();
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}
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#define arch_decomp_wdog()
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static void putc(char ch)
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{
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/*
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* Wait for room in the FIFO, then write the char into the FIFO
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*/
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while (__raw_readl(IOMEM(LL_UART_PADDR + UART_SR_OFFSET)) &
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UART_SR_TXFULL)
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cpu_relax();
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__raw_writel(ch, IOMEM(LL_UART_PADDR + UART_FIFO_OFFSET));
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}
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#endif
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