Haavard Skinnemoen cfd23e93a0 avr32: Store virtual addresses in the PGD ... Instead of storing physical addresses along with page flags in the PGD, store virtual addresses and use NULL to indicate a not present second-level page table. A non-page-aligned page table indicates a bad PMD. This simplifies the TLB miss handler since it no longer has to check the Present bit and no longer has to convert the PGD entry from physical to virtual address. Instead, it has to check for a NULL entry, which is slightly cheaper than either. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>		2008-07-02 11:01:28 +02:00
..
cache.c	[AVR32] Fix copy_to_user_page() breakage	2007-12-07 14:54:47 +01:00
clear_page.S	[PATCH] avr32 architecture	2006-09-26 08:48:54 -07:00
copy_page.S	[PATCH] avr32 architecture	2006-09-26 08:48:54 -07:00
dma-coherent.c	[AVR32] Drop GFP_COMP for DMA memory allocations	2008-01-25 08:31:39 +01:00
fault.c	avr32: Fix broken pte dump code in do_page_fault()	2008-02-13 14:44:04 +01:00
init.c	avr32: Store virtual addresses in the PGD	2008-07-02 11:01:28 +02:00
ioremap.c	[PATCH] AVR32: Don't try to iounmap P2 segment addresses	2006-10-25 20:26:33 -07:00
Makefile	[PATCH] avr32 architecture	2006-09-26 08:48:54 -07:00
tlb.c	avr32: Clean up and optimize the TLB operations	2008-07-02 11:01:28 +02:00