mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-23 20:53:53 +08:00
ed12dfc92f
Provide support for Sigma Designs Tango4 clock generator. NOTE: This driver is incompatible with Tango3 clkgen. Signed-off-by: Marc Gonzalez <marc_gonzalez@sigmadesigns.com> [sboyd@codeaurora.org: Add kernel.h include for panic/sprintf] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
24 lines
708 B
Plaintext
24 lines
708 B
Plaintext
* Sigma Designs Tango4 Clock Generator
|
|
|
|
The Tango4 clock generator outputs cpu_clk and sys_clk (the latter is used
|
|
for RAM and various peripheral devices). The clock binding described here
|
|
is applicable to all Tango4 SoCs.
|
|
|
|
Required Properties:
|
|
|
|
- compatible: should be "sigma,tango4-clkgen".
|
|
- reg: physical base address of the device and length of memory mapped region.
|
|
- clocks: phandle of the input clock (crystal oscillator).
|
|
- clock-output-names: should be "cpuclk" and "sysclk".
|
|
- #clock-cells: should be set to 1.
|
|
|
|
Example:
|
|
|
|
clkgen: clkgen@10000 {
|
|
compatible = "sigma,tango4-clkgen";
|
|
reg = <0x10000 0x40>;
|
|
clocks = <&xtal>;
|
|
clock-output-names = "cpuclk", "sysclk";
|
|
#clock-cells = <1>;
|
|
};
|