Kan Liang cf3beb7c90 perf/x86/intel: Fix incorrect lbr_sel_mask value ... This patch fixes a bug which was introduced by: b16a5b52eb ("perf/x86: Add option to disable reading branch flags/cycles") In this patch, lbr_sel_mask is used to mask the lbr_select. But LBR_SEL_MASK doesn't include the bit for LBR_CALL_STACK. So LBR call stack will never be set in lbr_select. This patch corrects the LBR_SEL_MASK by including all valid bits in LBR_SELECT. Also, the LBR_CALL_STACK bit is different as other bit in LBR_SELECT. It does not operate in suppress mode, so it needs to be specially handled in intel_pmu_setup_hw_lbr_filter. Signed-off-by: Kan Liang <kan.liang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Stephane Eranian <eranian@google.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Vince Weaver <vincent.weaver@maine.edu> Link: http://lkml.kernel.org/r/1461231010-4399-1-git-send-email-kan.liang@intel.com Signed-off-by: Ingo Molnar <mingo@kernel.org>		2016-04-28 10:32:43 +02:00
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bts.c
core.c	perf/x86/intel: Add model number for Skylake Server to perf	2016-04-23 13:46:44 +02:00
cqm.c	perf/x86/cqm: Factor out some common code	2016-03-21 09:08:22 +01:00
cstate.c
ds.c
knc.c
lbr.c	perf/x86/intel: Fix incorrect lbr_sel_mask value	2016-04-28 10:32:43 +02:00
p4.c
p6.c
pt.c	perf/x86/intel/pt: Don't die on VMXON	2016-04-28 10:32:42 +02:00
pt.h	perf/x86/intel/pt: Don't die on VMXON	2016-04-28 10:32:42 +02:00
rapl.c	perf/x86/intel/rapl: Add missing Haswell model	2016-04-23 13:46:45 +02:00
uncore_nhmex.c
uncore_snb.c
uncore_snbep.c	perf/x86/intel/uncore: Remove ev_sel_ext bit support for PCU	2016-03-21 11:16:19 +01:00
uncore.c
uncore.h