mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-15 16:53:54 +08:00
cf1f6877b0
While CXL memory targets will have their own memory target node, individual memory devices may be affinitized like other PCI devices. Emit that attribute for memdevs. Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Link: https://lore.kernel.org/r/164298428430.3018233.16409089892707993289.stgit@dwillia2-desk3.amr.corp.intel.com Signed-off-by: Dan Williams <dan.j.williams@intel.com> |
||
---|---|---|
.. | ||
core | ||
acpi.c | ||
cxl.h | ||
cxlmem.h | ||
cxlpci.h | ||
Kconfig | ||
Makefile | ||
pci.c | ||
pmem.c | ||
port.c |