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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-15 16:53:54 +08:00
linux-next/drivers/cxl
Dan Williams cf1f6877b0 cxl/memdev: Add numa_node attribute
While CXL memory targets will have their own memory target node,
individual memory devices may be affinitized like other PCI devices.
Emit that attribute for memdevs.

Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/164298428430.3018233.16409089892707993289.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2022-02-08 22:57:32 -08:00
..
core cxl/memdev: Add numa_node attribute 2022-02-08 22:57:32 -08:00
acpi.c cxl/core/port: Remove @host argument for dport + decoder enumeration 2022-02-08 22:57:30 -08:00
cxl.h cxl/core/port: Remove @host argument for dport + decoder enumeration 2022-02-08 22:57:30 -08:00
cxlmem.h cxl/pci: Emit device serial number 2022-02-08 22:57:32 -08:00
cxlpci.h cxl/pci: Retrieve CXL DVSEC memory info 2022-02-08 22:57:31 -08:00
Kconfig cxl/port: Add a driver for 'struct cxl_port' objects 2022-02-08 22:57:30 -08:00
Makefile cxl/port: Add a driver for 'struct cxl_port' objects 2022-02-08 22:57:30 -08:00
pci.c cxl/pci: Emit device serial number 2022-02-08 22:57:32 -08:00
pmem.c cxl: Prove CXL locking 2022-02-08 22:57:29 -08:00
port.c cxl/core/port: Remove @host argument for dport + decoder enumeration 2022-02-08 22:57:30 -08:00