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linux-next/arch/powerpc/perf
sukadev@linux.vnet.ibm.com e6878835ac powerpc/perf: Sample only if SIAR-Valid bit is set in P7+
powerpc/perf: Sample only if SIAR-Valid bit is set in P7+

On POWER7+ two new bits (mmcra[35] and mmcra[36]) indicate whether the
contents of SIAR and SDAR are valid.

For marked instructions on P7+, we must save the contents of SIAR and
SDAR registers only if these new bits are set.

This code/check for the SIAR-Valid bit is specific to P7+, so rather than
waste a CPU-feature bit use the PVR flag.

Note that Carl Love proposed a similar change for oprofile:

        https://lkml.org/lkml/2012/6/22/309

Signed-off-by: Sukadev Bhattiprolu <sukadev@linux.vnet.ibm.com>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
2012-09-27 12:51:05 +10:00
..
callchain.c powerpc/perf: Use perf_instruction_pointer in callchains 2012-07-10 19:18:46 +10:00
core-book3s.c powerpc/perf: Sample only if SIAR-Valid bit is set in P7+ 2012-09-27 12:51:05 +10:00
core-fsl-emb.c perf: Pass last sampling period to perf_sample_data_init() 2012-05-09 15:23:12 +02:00
e500-pmu.c
Makefile
mpc7450-pmu.c
power4-pmu.c powerpc/perf: Fix instruction address sampling on 970 and Power4 2012-03-28 11:33:24 +11:00
power5-pmu.c
power5+-pmu.c
power6-pmu.c
power7-pmu.c powerpc/perf: Sample only if SIAR-Valid bit is set in P7+ 2012-09-27 12:51:05 +10:00
ppc970-pmu.c powerpc/perf: Fix instruction address sampling on 970 and Power4 2012-03-28 11:33:24 +11:00