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linux-next/drivers/net/ethernet/chelsio
Hariprasad Shenai ce8f407a3c cxgb4/cxgb4vf: For T5 use Packing and Padding Boundaries for SGE DMA transfers
T5 introduces the ability to have separate Packing and Padding Boundaries
for SGE DMA transfers from the chip to Host Memory. This change set takes
advantage of that to set up a smaller Padding Boundary to conserve PCI Link
and Memory Bandwidth with T5.

Signed-off-by: Hariprasad Shenai <hariprasad@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2014-11-10 14:15:03 -05:00
..
cxgb PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use 2014-08-12 12:15:14 -06:00
cxgb3 PCI: Remove DEFINE_PCI_DEVICE_TABLE macro use 2014-08-12 12:15:14 -06:00
cxgb4 cxgb4/cxgb4vf: For T5 use Packing and Padding Boundaries for SGE DMA transfers 2014-11-10 14:15:03 -05:00
cxgb4vf cxgb4/cxgb4vf: For T5 use Packing and Padding Boundaries for SGE DMA transfers 2014-11-10 14:15:03 -05:00
Kconfig cxgb4 : Fix build failure in cxgb4 when ipv6 is disabled/not in-built 2014-10-15 00:28:58 -04:00
Makefile