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ce5b972bc8
Many magic data are re-configured for PHY during its reset operation based on chip type to get better compability and stability. REG_PHY_CTRL register may be configured by BIOS before enter OS. so, the driver can't directly write to it without any Read-Op. this change also affect suspend and phy_disable routines. PHY debug ports and extension registers are refined as well. Signed-off-by: xiong <xiong@qca.qualcomm.com> Tested-by: Liu David <dwliu@qca.qualcomm.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
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Makefile |