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051bd84bb4
Some TI platforms, specifically those in the am33xx, am43xx, dra7xx, and am57xx families of SoCs can make use of the ti-cpufreq driver to selectively enable OPPs based on the exact configuration in use. The ti-cpufreq is given the responsibility of creating the cpufreq-dt platform device when the driver is in use so drop am33xx and dra7xx from the cpufreq-dt-platdev driver so it is not created twice. Acked-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
120 lines
3.5 KiB
C
120 lines
3.5 KiB
C
/*
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* Copyright (C) 2016 Linaro.
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* Viresh Kumar <viresh.kumar@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/err.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include "cpufreq-dt.h"
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static const struct of_device_id machines[] __initconst = {
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{ .compatible = "allwinner,sun4i-a10", },
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{ .compatible = "allwinner,sun5i-a10s", },
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{ .compatible = "allwinner,sun5i-a13", },
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{ .compatible = "allwinner,sun5i-r8", },
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{ .compatible = "allwinner,sun6i-a31", },
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{ .compatible = "allwinner,sun6i-a31s", },
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{ .compatible = "allwinner,sun7i-a20", },
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{ .compatible = "allwinner,sun8i-a23", },
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{ .compatible = "allwinner,sun8i-a33", },
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{ .compatible = "allwinner,sun8i-a83t", },
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{ .compatible = "allwinner,sun8i-h3", },
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{ .compatible = "apm,xgene-shadowcat", },
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{ .compatible = "arm,integrator-ap", },
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{ .compatible = "arm,integrator-cp", },
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{ .compatible = "hisilicon,hi6220", },
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{ .compatible = "fsl,imx27", },
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{ .compatible = "fsl,imx51", },
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{ .compatible = "fsl,imx53", },
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{ .compatible = "fsl,imx7d", },
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{ .compatible = "marvell,berlin", },
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{ .compatible = "marvell,pxa250", },
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{ .compatible = "marvell,pxa270", },
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{ .compatible = "samsung,exynos3250", },
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{ .compatible = "samsung,exynos4210", },
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{ .compatible = "samsung,exynos4212", },
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{ .compatible = "samsung,exynos4412", },
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{ .compatible = "samsung,exynos5250", },
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#ifndef CONFIG_BL_SWITCHER
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{ .compatible = "samsung,exynos5420", },
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{ .compatible = "samsung,exynos5433", },
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{ .compatible = "samsung,exynos5800", },
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#endif
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{ .compatible = "renesas,emev2", },
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{ .compatible = "renesas,r7s72100", },
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{ .compatible = "renesas,r8a73a4", },
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{ .compatible = "renesas,r8a7740", },
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{ .compatible = "renesas,r8a7743", },
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{ .compatible = "renesas,r8a7745", },
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{ .compatible = "renesas,r8a7778", },
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{ .compatible = "renesas,r8a7779", },
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{ .compatible = "renesas,r8a7790", },
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{ .compatible = "renesas,r8a7791", },
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{ .compatible = "renesas,r8a7792", },
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{ .compatible = "renesas,r8a7793", },
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{ .compatible = "renesas,r8a7794", },
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{ .compatible = "renesas,sh73a0", },
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{ .compatible = "rockchip,rk2928", },
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{ .compatible = "rockchip,rk3036", },
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{ .compatible = "rockchip,rk3066a", },
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{ .compatible = "rockchip,rk3066b", },
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{ .compatible = "rockchip,rk3188", },
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{ .compatible = "rockchip,rk3228", },
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{ .compatible = "rockchip,rk3288", },
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{ .compatible = "rockchip,rk3366", },
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{ .compatible = "rockchip,rk3368", },
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{ .compatible = "rockchip,rk3399", },
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{ .compatible = "sigma,tango4" },
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{ .compatible = "socionext,uniphier-pro5", },
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{ .compatible = "socionext,uniphier-pxs2", },
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{ .compatible = "socionext,uniphier-ld6b", },
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{ .compatible = "socionext,uniphier-ld11", },
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{ .compatible = "socionext,uniphier-ld20", },
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{ .compatible = "ti,omap2", },
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{ .compatible = "ti,omap3", },
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{ .compatible = "ti,omap4", },
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{ .compatible = "ti,omap5", },
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{ .compatible = "xlnx,zynq-7000", },
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{ .compatible = "zte,zx296718", },
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{ }
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};
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static int __init cpufreq_dt_platdev_init(void)
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{
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struct device_node *np = of_find_node_by_path("/");
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const struct of_device_id *match;
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if (!np)
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return -ENODEV;
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match = of_match_node(machines, np);
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of_node_put(np);
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if (!match)
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return -ENODEV;
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return PTR_ERR_OR_ZERO(platform_device_register_data(NULL, "cpufreq-dt",
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-1, match->data,
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sizeof(struct cpufreq_dt_platform_data)));
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}
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device_initcall(cpufreq_dt_platdev_init);
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