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e90a0f3c46
This patch moves header files from plat-s5p to plat-samsung to remove plat-s5p directory to make one plat-samsung directory for Samsung SoCs. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
55 lines
1.6 KiB
C
55 lines
1.6 KiB
C
/* linux/arch/arm/plat-samsung/include/plat/regs-srom.h
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*
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* Copyright (c) 2010 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* S5P SROMC register definitions
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __PLAT_SAMSUNG_REGS_SROM_H
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#define __PLAT_SAMSUNG_REGS_SROM_H __FILE__
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#include <mach/map.h>
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#define S5P_SROMREG(x) (S5P_VA_SROMC + (x))
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#define S5P_SROM_BW S5P_SROMREG(0x0)
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#define S5P_SROM_BC0 S5P_SROMREG(0x4)
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#define S5P_SROM_BC1 S5P_SROMREG(0x8)
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#define S5P_SROM_BC2 S5P_SROMREG(0xc)
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#define S5P_SROM_BC3 S5P_SROMREG(0x10)
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#define S5P_SROM_BC4 S5P_SROMREG(0x14)
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#define S5P_SROM_BC5 S5P_SROMREG(0x18)
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/* one register BW holds 4 x 4-bit packed settings for NCS0 - NCS3 */
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#define S5P_SROM_BW__DATAWIDTH__SHIFT 0
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#define S5P_SROM_BW__ADDRMODE__SHIFT 1
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#define S5P_SROM_BW__WAITENABLE__SHIFT 2
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#define S5P_SROM_BW__BYTEENABLE__SHIFT 3
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#define S5P_SROM_BW__CS_MASK 0xf
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#define S5P_SROM_BW__NCS0__SHIFT 0
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#define S5P_SROM_BW__NCS1__SHIFT 4
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#define S5P_SROM_BW__NCS2__SHIFT 8
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#define S5P_SROM_BW__NCS3__SHIFT 12
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#define S5P_SROM_BW__NCS4__SHIFT 16
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#define S5P_SROM_BW__NCS5__SHIFT 20
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/* applies to same to BCS0 - BCS3 */
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#define S5P_SROM_BCX__PMC__SHIFT 0
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#define S5P_SROM_BCX__TACP__SHIFT 4
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#define S5P_SROM_BCX__TCAH__SHIFT 8
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#define S5P_SROM_BCX__TCOH__SHIFT 12
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#define S5P_SROM_BCX__TACC__SHIFT 16
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#define S5P_SROM_BCX__TCOS__SHIFT 24
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#define S5P_SROM_BCX__TACS__SHIFT 28
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#endif /* __PLAT_SAMSUNG_REGS_SROM_H */
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