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31ba88083f
Add hwmod support for the EMAC (and MDIO) ethernet controller that's on the am35x family of SoC's. Signed-off-by: Mark A. Greer <mgreer@animalcreek.com> [paul@pwsan.com: updated subject line; updated to apply on v3.5-rc4; added comments to hwmod data regarding IPSS] Signed-off-by: Paul Walmsley <paul@pwsan.com>
47 lines
1.5 KiB
C
47 lines
1.5 KiB
C
/*:
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* Address mappings and base address for AM35XX specific interconnects
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* and peripherals.
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*
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* Copyright (C) 2009 Texas Instruments
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*
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* Author: Sriramakrishnan <srk@ti.com>
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* Vaibhav Hiremath <hvaibhav@ti.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef __ASM_ARCH_AM35XX_H
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#define __ASM_ARCH_AM35XX_H
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/*
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* Base addresses
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* Note: OMAP3430 IVA2 memory space is being used for AM35xx IPSS modules
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*/
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#define AM35XX_IPSS_EMAC_BASE 0x5C000000
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#define AM35XX_IPSS_USBOTGSS_BASE 0x5C040000
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#define AM35XX_IPSS_HECC_BASE 0x5C050000
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#define AM35XX_IPSS_VPFE_BASE 0x5C060000
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/* HECC module specifc offset definitions */
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#define AM35XX_HECC_SCC_HECC_OFFSET (0x0)
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#define AM35XX_HECC_SCC_RAM_OFFSET (0x3000)
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#define AM35XX_HECC_RAM_OFFSET (0x3000)
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#define AM35XX_HECC_MBOX_OFFSET (0x2000)
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#define AM35XX_HECC_INT_LINE (0x0)
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#define AM35XX_HECC_VERSION (0x1)
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#define AM35XX_EMAC_CNTRL_OFFSET (0x10000)
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#define AM35XX_EMAC_CNTRL_MOD_OFFSET (0x0)
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#define AM35XX_EMAC_CNTRL_RAM_OFFSET (0x20000)
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#define AM35XX_EMAC_MDIO_OFFSET (0x30000)
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#define AM35XX_IPSS_MDIO_BASE (AM35XX_IPSS_EMAC_BASE + \
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AM35XX_EMAC_MDIO_OFFSET)
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#define AM35XX_EMAC_CNTRL_RAM_SIZE (0x2000)
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#define AM35XX_EMAC_RAM_ADDR (AM3517_EMAC_BASE + \
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AM3517_EMAC_CNTRL_RAM_OFFSET)
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#define AM35XX_EMAC_HW_RAM_ADDR (0x01E20000)
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#endif /* __ASM_ARCH_AM35XX_H */
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