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MSR Trace Events
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================
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The x86 kernel supports tracing most MSR (Model Specific Register) accesses.
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To see the definition of the MSRs on Intel systems please see the SDM
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at http://www.intel.com/sdm (Volume 3)
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Available trace points:
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/sys/kernel/debug/tracing/events/msr/
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Trace MSR reads:
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read_msr
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- msr: MSR number
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- val: Value written
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- failed: 1 if the access failed, otherwise 0
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Trace MSR writes:
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write_msr
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- msr: MSR number
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- val: Value written
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- failed: 1 if the access failed, otherwise 0
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Trace RDPMC in kernel:
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rdpmc
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The trace data can be post processed with the postprocess/decode_msr.py script::
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cat /sys/kernel/debug/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h
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to add symbolic MSR names.
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