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3eb0be3042
Commit 93dc688
(ARM: 7684/1: errata: Workaround for Cortex-A15 erratum
798181 (TLBI/DSB operations)) introduces calls to smp_processor_id() and
smp_call_function_many() with preemption enabled. This patch disables
preemption and also optimises the smp_processor_id() call in
broadcast_tlb_mm_a15_erratum(). The broadcast_tlb_a15_erratum() function
is changed to use smp_call_function() which disables preemption.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Reported-by: Geoff Levand <geoff@infradead.org>
Reported-by: Nicolas Pitre <nicolas.pitre@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
209 lines
4.6 KiB
C
209 lines
4.6 KiB
C
/*
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* linux/arch/arm/kernel/smp_tlb.c
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*
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* Copyright (C) 2002 ARM Limited, All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/preempt.h>
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#include <linux/smp.h>
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#include <asm/smp_plat.h>
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#include <asm/tlbflush.h>
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#include <asm/mmu_context.h>
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/**********************************************************************/
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/*
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* TLB operations
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*/
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struct tlb_args {
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struct vm_area_struct *ta_vma;
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unsigned long ta_start;
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unsigned long ta_end;
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};
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static inline void ipi_flush_tlb_all(void *ignored)
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{
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local_flush_tlb_all();
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}
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static inline void ipi_flush_tlb_mm(void *arg)
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{
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struct mm_struct *mm = (struct mm_struct *)arg;
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local_flush_tlb_mm(mm);
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}
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static inline void ipi_flush_tlb_page(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_page(ta->ta_vma, ta->ta_start);
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}
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static inline void ipi_flush_tlb_kernel_page(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_kernel_page(ta->ta_start);
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}
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static inline void ipi_flush_tlb_range(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_range(ta->ta_vma, ta->ta_start, ta->ta_end);
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}
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static inline void ipi_flush_tlb_kernel_range(void *arg)
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{
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struct tlb_args *ta = (struct tlb_args *)arg;
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local_flush_tlb_kernel_range(ta->ta_start, ta->ta_end);
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}
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static inline void ipi_flush_bp_all(void *ignored)
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{
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local_flush_bp_all();
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}
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#ifdef CONFIG_ARM_ERRATA_798181
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static int erratum_a15_798181(void)
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{
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unsigned int midr = read_cpuid_id();
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/* Cortex-A15 r0p0..r3p2 affected */
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if ((midr & 0xff0ffff0) != 0x410fc0f0 || midr > 0x413fc0f2)
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return 0;
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return 1;
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}
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#else
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static int erratum_a15_798181(void)
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{
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return 0;
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}
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#endif
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static void ipi_flush_tlb_a15_erratum(void *arg)
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{
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dmb();
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}
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static void broadcast_tlb_a15_erratum(void)
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{
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if (!erratum_a15_798181())
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return;
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dummy_flush_tlb_a15_erratum();
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smp_call_function(ipi_flush_tlb_a15_erratum, NULL, 1);
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}
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static void broadcast_tlb_mm_a15_erratum(struct mm_struct *mm)
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{
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int cpu, this_cpu;
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cpumask_t mask = { CPU_BITS_NONE };
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if (!erratum_a15_798181())
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return;
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dummy_flush_tlb_a15_erratum();
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this_cpu = get_cpu();
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for_each_online_cpu(cpu) {
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if (cpu == this_cpu)
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continue;
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/*
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* We only need to send an IPI if the other CPUs are running
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* the same ASID as the one being invalidated. There is no
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* need for locking around the active_asids check since the
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* switch_mm() function has at least one dmb() (as required by
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* this workaround) in case a context switch happens on
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* another CPU after the condition below.
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*/
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if (atomic64_read(&mm->context.id) ==
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atomic64_read(&per_cpu(active_asids, cpu)))
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cpumask_set_cpu(cpu, &mask);
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}
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smp_call_function_many(&mask, ipi_flush_tlb_a15_erratum, NULL, 1);
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put_cpu();
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}
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void flush_tlb_all(void)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu(ipi_flush_tlb_all, NULL, 1);
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else
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local_flush_tlb_all();
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broadcast_tlb_a15_erratum();
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}
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void flush_tlb_mm(struct mm_struct *mm)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu_mask(mm_cpumask(mm), ipi_flush_tlb_mm, mm, 1);
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else
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local_flush_tlb_mm(mm);
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broadcast_tlb_mm_a15_erratum(mm);
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}
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void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_vma = vma;
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ta.ta_start = uaddr;
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on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_page,
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&ta, 1);
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} else
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local_flush_tlb_page(vma, uaddr);
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broadcast_tlb_mm_a15_erratum(vma->vm_mm);
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}
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void flush_tlb_kernel_page(unsigned long kaddr)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_start = kaddr;
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on_each_cpu(ipi_flush_tlb_kernel_page, &ta, 1);
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} else
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local_flush_tlb_kernel_page(kaddr);
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broadcast_tlb_a15_erratum();
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}
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void flush_tlb_range(struct vm_area_struct *vma,
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unsigned long start, unsigned long end)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_vma = vma;
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ta.ta_start = start;
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ta.ta_end = end;
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on_each_cpu_mask(mm_cpumask(vma->vm_mm), ipi_flush_tlb_range,
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&ta, 1);
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} else
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local_flush_tlb_range(vma, start, end);
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broadcast_tlb_mm_a15_erratum(vma->vm_mm);
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}
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void flush_tlb_kernel_range(unsigned long start, unsigned long end)
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{
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if (tlb_ops_need_broadcast()) {
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struct tlb_args ta;
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ta.ta_start = start;
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ta.ta_end = end;
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on_each_cpu(ipi_flush_tlb_kernel_range, &ta, 1);
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} else
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local_flush_tlb_kernel_range(start, end);
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broadcast_tlb_a15_erratum();
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}
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void flush_bp_all(void)
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{
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if (tlb_ops_need_broadcast())
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on_each_cpu(ipi_flush_bp_all, NULL, 1);
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else
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local_flush_bp_all();
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}
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