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71b9114d2c
s3c24xx and s3c64xx have a lot in common, but are split across three
separate directories, which makes the interaction of the header files
more complicated than necessary.
Move all three directories into a new mach-s3c, with a minimal
set of changes to each file.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[krzk: Rebase, add s3c24xx and s3c64xx suffix to several files, add SPDX
headers to new files, remove plat-samsung from MAINTAINERS]
Co-developed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
https://lore.kernel.org/r/20200806182059.2431-39-krzk@kernel.org
51 lines
1.3 KiB
C
51 lines
1.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Copyright (c) 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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* ANUBIS - CPLD control constants
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* ANUBIS - IRQ Number definitions
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* ANUBIS - Memory map definitions
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*/
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#ifndef __MACH_S3C24XX_ANUBIS_H
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#define __MACH_S3C24XX_ANUBIS_H __FILE__
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/* CTRL2 - NAND WP control, IDE Reset assert/check */
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#define ANUBIS_CTRL1_NANDSEL (0x3)
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/* IDREG - revision */
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#define ANUBIS_IDREG_REVMASK (0x7)
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/* irq */
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#define ANUBIS_IRQ_IDE0 IRQ_EINT2
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#define ANUBIS_IRQ_IDE1 IRQ_EINT3
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#define ANUBIS_IRQ_ASIX IRQ_EINT1
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/* map */
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/* start peripherals off after the S3C2410 */
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#define ANUBIS_IOADDR(x) (S3C2410_ADDR((x) + 0x01800000))
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#define ANUBIS_PA_CPLD (S3C2410_CS1 | (1<<26))
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/* we put the CPLD registers next, to get them out of the way */
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#define ANUBIS_VA_CTRL1 ANUBIS_IOADDR(0x00000000)
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#define ANUBIS_PA_CTRL1 ANUBIS_PA_CPLD
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#define ANUBIS_VA_IDREG ANUBIS_IOADDR(0x00300000)
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#define ANUBIS_PA_IDREG (ANUBIS_PA_CPLD + (3 << 23))
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#define ANUBIS_IDEPRI ANUBIS_IOADDR(0x01000000)
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#define ANUBIS_IDEPRIAUX ANUBIS_IOADDR(0x01100000)
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#define ANUBIS_IDESEC ANUBIS_IOADDR(0x01200000)
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#define ANUBIS_IDESECAUX ANUBIS_IOADDR(0x01300000)
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#endif /* __MACH_S3C24XX_ANUBIS_H */
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