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1c75c42100
From Dinh Nguyen, this is a series of patches introducing support for socfpga hardware (Altera Cyclone5). It also includes a cleanup that moves some of the ARMv7 cache maintenance functions to a common location, since three other platforms aready implemented it separately. * socfpga/hw: arm: socfpga: Add SMP support for actual socfpga harware arm: Add v7_invalidate_l1 to cache-v7.S arm: socfpga: Add entries to enable make dtbs socfpga arm: socfpga: Add new device tree source for actual socfpga HW Trivial conflict in arch/arm/mach-tegra/headsmp.S. Signed-off-by: Olof Johansson <olof@lixom.net>
15 lines
314 B
ArmAsm
15 lines
314 B
ArmAsm
#include <linux/linkage.h>
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#include <linux/init.h>
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#include "sleep.h"
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.section ".text.head", "ax"
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ENTRY(tegra_secondary_startup)
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bl v7_invalidate_l1
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/* Enable coresight */
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mov32 r0, 0xC5ACCE55
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mcr p14, 0, r0, c7, c12, 6
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b secondary_startup
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ENDPROC(tegra_secondary_startup)
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