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393 lines
10 KiB
C
393 lines
10 KiB
C
/* sun3x_esp.c: EnhancedScsiProcessor Sun3x SCSI driver code.
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*
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* (C) 1999 Thomas Bogendoerfer (tsbogend@alpha.franken.de)
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*
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* Based on David S. Miller's esp driver
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/string.h>
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#include <linux/slab.h>
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#include <linux/blkdev.h>
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#include <linux/proc_fs.h>
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#include <linux/stat.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include "scsi.h"
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#include <scsi/scsi_host.h>
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#include "NCR53C9x.h"
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#include <asm/sun3x.h>
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#include <asm/dvma.h>
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#include <asm/irq.h>
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static void dma_barrier(struct NCR_ESP *esp);
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count);
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static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_drain(struct NCR_ESP *esp);
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static void dma_invalidate(struct NCR_ESP *esp);
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static void dma_dump_state(struct NCR_ESP *esp);
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static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length);
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static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length);
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static void dma_ints_off(struct NCR_ESP *esp);
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static void dma_ints_on(struct NCR_ESP *esp);
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static int dma_irq_p(struct NCR_ESP *esp);
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static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr);
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static int dma_ports_p(struct NCR_ESP *esp);
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static void dma_reset(struct NCR_ESP *esp);
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static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write);
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static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp);
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static void dma_advance_sg (Scsi_Cmnd *sp);
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/* Detecting ESP chips on the machine. This is the simple and easy
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* version.
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*/
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int sun3x_esp_detect(struct scsi_host_template *tpnt)
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{
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struct NCR_ESP *esp;
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struct ConfigDev *esp_dev;
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esp_dev = 0;
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esp = esp_allocate(tpnt, (void *) esp_dev);
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/* Do command transfer with DMA */
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esp->do_pio_cmds = 0;
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/* Required functions */
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esp->dma_bytes_sent = &dma_bytes_sent;
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esp->dma_can_transfer = &dma_can_transfer;
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esp->dma_dump_state = &dma_dump_state;
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esp->dma_init_read = &dma_init_read;
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esp->dma_init_write = &dma_init_write;
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esp->dma_ints_off = &dma_ints_off;
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esp->dma_ints_on = &dma_ints_on;
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esp->dma_irq_p = &dma_irq_p;
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esp->dma_ports_p = &dma_ports_p;
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esp->dma_setup = &dma_setup;
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/* Optional functions */
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esp->dma_barrier = &dma_barrier;
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esp->dma_invalidate = &dma_invalidate;
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esp->dma_drain = &dma_drain;
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esp->dma_irq_entry = 0;
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esp->dma_irq_exit = 0;
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esp->dma_led_on = 0;
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esp->dma_led_off = 0;
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esp->dma_poll = &dma_poll;
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esp->dma_reset = &dma_reset;
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/* virtual DMA functions */
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esp->dma_mmu_get_scsi_one = &dma_mmu_get_scsi_one;
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esp->dma_mmu_get_scsi_sgl = &dma_mmu_get_scsi_sgl;
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esp->dma_mmu_release_scsi_one = &dma_mmu_release_scsi_one;
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esp->dma_mmu_release_scsi_sgl = &dma_mmu_release_scsi_sgl;
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esp->dma_advance_sg = &dma_advance_sg;
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/* SCSI chip speed */
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esp->cfreq = 20000000;
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esp->eregs = (struct ESP_regs *)(SUN3X_ESP_BASE);
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esp->dregs = (void *)SUN3X_ESP_DMA;
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esp->esp_command = (volatile unsigned char *)dvma_malloc(DVMA_PAGE_SIZE);
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esp->esp_command_dvma = dvma_vtob((unsigned long)esp->esp_command);
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esp->irq = 2;
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if (request_irq(esp->irq, esp_intr, SA_INTERRUPT,
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"SUN3X SCSI", esp->ehost)) {
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esp_deallocate(esp);
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return 0;
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}
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esp->scsi_id = 7;
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esp->diff = 0;
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esp_initialize(esp);
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/* for reasons beyond my knowledge (and which should likely be fixed)
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sync mode doesn't work on a 3/80 at 5mhz. but it does at 4. */
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esp->sync_defp = 0x3f;
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printk("ESP: Total of %d ESP hosts found, %d actually in use.\n", nesps,
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esps_in_use);
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esps_running = esps_in_use;
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return esps_in_use;
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}
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static void dma_do_drain(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int count = 500000;
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while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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dregs->cond_reg |= DMA_FIFO_STDRAIN;
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count = 500000;
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while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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}
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static void dma_barrier(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int count = 500000;
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while((dregs->cond_reg & DMA_PEND_READ) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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dregs->cond_reg &= ~(DMA_ENABLE);
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}
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/* This uses various DMA csr fields and the fifo flags count value to
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* determine how many bytes were successfully sent/received by the ESP.
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*/
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static int dma_bytes_sent(struct NCR_ESP *esp, int fifo_count)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int rval = dregs->st_addr - esp->esp_command_dvma;
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return rval - fifo_count;
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}
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static int dma_can_transfer(struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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return sp->SCp.this_residual;
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}
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static void dma_drain(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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int count = 500000;
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if(dregs->cond_reg & DMA_FIFO_ISDRAIN) {
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dregs->cond_reg |= DMA_FIFO_STDRAIN;
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while((dregs->cond_reg & DMA_FIFO_ISDRAIN) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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}
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}
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static void dma_invalidate(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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__u32 tmp;
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int count = 500000;
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while(((tmp = dregs->cond_reg) & DMA_PEND_READ) && (--count > 0))
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udelay(1);
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if(!count) {
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printk("%s:%d timeout CSR %08lx\n", __FILE__, __LINE__, dregs->cond_reg);
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}
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dregs->cond_reg = tmp | DMA_FIFO_INV;
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dregs->cond_reg &= ~DMA_FIFO_INV;
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}
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static void dma_dump_state(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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ESPLOG(("esp%d: dma -- cond_reg<%08lx> addr<%08lx>\n",
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esp->esp_id, dregs->cond_reg, dregs->st_addr));
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}
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static void dma_init_read(struct NCR_ESP *esp, __u32 vaddress, int length)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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dregs->st_addr = vaddress;
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dregs->cond_reg |= (DMA_ST_WRITE | DMA_ENABLE);
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}
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static void dma_init_write(struct NCR_ESP *esp, __u32 vaddress, int length)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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/* Set up the DMA counters */
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dregs->st_addr = vaddress;
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dregs->cond_reg = ((dregs->cond_reg & ~(DMA_ST_WRITE)) | DMA_ENABLE);
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}
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static void dma_ints_off(struct NCR_ESP *esp)
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{
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DMA_INTSOFF((struct sparc_dma_registers *) esp->dregs);
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}
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static void dma_ints_on(struct NCR_ESP *esp)
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{
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DMA_INTSON((struct sparc_dma_registers *) esp->dregs);
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}
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static int dma_irq_p(struct NCR_ESP *esp)
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{
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return DMA_IRQ_P((struct sparc_dma_registers *) esp->dregs);
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}
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static void dma_poll(struct NCR_ESP *esp, unsigned char *vaddr)
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{
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int count = 50;
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dma_do_drain(esp);
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/* Wait till the first bits settle. */
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while((*(volatile unsigned char *)vaddr == 0xff) && (--count > 0))
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udelay(1);
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if(!count) {
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// printk("%s:%d timeout expire (data %02x)\n", __FILE__, __LINE__,
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// esp_read(esp->eregs->esp_fdata));
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//mach_halt();
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vaddr[0] = esp_read(esp->eregs->esp_fdata);
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vaddr[1] = esp_read(esp->eregs->esp_fdata);
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}
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}
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static int dma_ports_p(struct NCR_ESP *esp)
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{
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return (((struct sparc_dma_registers *) esp->dregs)->cond_reg
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& DMA_INT_ENAB);
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}
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/* Resetting various pieces of the ESP scsi driver chipset/buses. */
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static void dma_reset(struct NCR_ESP *esp)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *)esp->dregs;
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/* Punt the DVMA into a known state. */
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dregs->cond_reg |= DMA_RST_SCSI;
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dregs->cond_reg &= ~(DMA_RST_SCSI);
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DMA_INTSON(dregs);
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}
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static void dma_setup(struct NCR_ESP *esp, __u32 addr, int count, int write)
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{
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struct sparc_dma_registers *dregs =
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(struct sparc_dma_registers *) esp->dregs;
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unsigned long nreg = dregs->cond_reg;
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// printk("dma_setup %c addr %08x cnt %08x\n",
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// write ? 'W' : 'R', addr, count);
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dma_do_drain(esp);
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if(write)
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nreg |= DMA_ST_WRITE;
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else {
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nreg &= ~(DMA_ST_WRITE);
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}
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nreg |= DMA_ENABLE;
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dregs->cond_reg = nreg;
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dregs->st_addr = addr;
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}
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static void dma_mmu_get_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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sp->SCp.have_data_in = dvma_map((unsigned long)sp->SCp.buffer,
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sp->SCp.this_residual);
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sp->SCp.ptr = (char *)((unsigned long)sp->SCp.have_data_in);
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}
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static void dma_mmu_get_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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int sz = sp->SCp.buffers_residual;
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struct scatterlist *sg = sp->SCp.buffer;
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while (sz >= 0) {
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sg[sz].dvma_address = dvma_map((unsigned long)page_address(sg[sz].page) +
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sg[sz].offset, sg[sz].length);
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sz--;
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}
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sp->SCp.ptr=(char *)((unsigned long)sp->SCp.buffer->dvma_address);
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}
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static void dma_mmu_release_scsi_one (struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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dvma_unmap((char *)sp->SCp.have_data_in);
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}
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static void dma_mmu_release_scsi_sgl (struct NCR_ESP *esp, Scsi_Cmnd *sp)
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{
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int sz = sp->use_sg - 1;
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struct scatterlist *sg = (struct scatterlist *)sp->buffer;
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while(sz >= 0) {
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dvma_unmap((char *)sg[sz].dvma_address);
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sz--;
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}
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}
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static void dma_advance_sg (Scsi_Cmnd *sp)
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{
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sp->SCp.ptr = (char *)((unsigned long)sp->SCp.buffer->dvma_address);
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}
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static int sun3x_esp_release(struct Scsi_Host *instance)
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{
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/* this code does not support being compiled as a module */
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return 1;
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}
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static struct scsi_host_template driver_template = {
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.proc_name = "sun3x_esp",
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.proc_info = &esp_proc_info,
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.name = "Sun ESP 100/100a/200",
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.detect = sun3x_esp_detect,
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.release = sun3x_esp_release,
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.slave_alloc = esp_slave_alloc,
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.slave_destroy = esp_slave_destroy,
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.info = esp_info,
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.queuecommand = esp_queue,
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.eh_abort_handler = esp_abort,
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.eh_bus_reset_handler = esp_reset,
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.can_queue = 7,
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.this_id = 7,
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.sg_tablesize = SG_ALL,
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.cmd_per_lun = 1,
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.use_clustering = DISABLE_CLUSTERING,
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};
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#include "scsi_module.c"
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MODULE_LICENSE("GPL");
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