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https://github.com/edk2-porting/linux-next.git
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ca6f2d7faf
!!value works out to an int while we were still using %ld, so fix this up and shut gcc up. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
578 lines
12 KiB
C
578 lines
12 KiB
C
/*
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* Pinmuxed GPIO support for SuperH.
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*
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* Copyright (C) 2008 Magnus Damm
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/list.h>
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#include <linux/module.h>
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <linux/irq.h>
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#include <linux/bitops.h>
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#include <linux/gpio.h>
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static int enum_in_range(pinmux_enum_t enum_id, struct pinmux_range *r)
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{
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if (enum_id < r->begin)
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return 0;
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if (enum_id > r->end)
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return 0;
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return 1;
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}
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static unsigned long gpio_read_raw_reg(unsigned long reg,
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unsigned long reg_width)
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{
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switch (reg_width) {
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case 8:
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return __raw_readb(reg);
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case 16:
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return __raw_readw(reg);
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case 32:
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return __raw_readl(reg);
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}
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BUG();
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return 0;
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}
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static void gpio_write_raw_reg(unsigned long reg,
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unsigned long reg_width,
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unsigned long data)
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{
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switch (reg_width) {
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case 8:
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__raw_writeb(data, reg);
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return;
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case 16:
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__raw_writew(data, reg);
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return;
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case 32:
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__raw_writel(data, reg);
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return;
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}
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BUG();
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}
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static void gpio_write_bit(struct pinmux_data_reg *dr,
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unsigned long in_pos, unsigned long value)
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{
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unsigned long pos;
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pos = dr->reg_width - (in_pos + 1);
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pr_debug("write_bit addr = %lx, value = %d, pos = %ld, "
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"r_width = %ld\n",
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dr->reg, !!value, pos, dr->reg_width);
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if (value)
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set_bit(pos, &dr->reg_shadow);
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else
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clear_bit(pos, &dr->reg_shadow);
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gpio_write_raw_reg(dr->reg, dr->reg_width, dr->reg_shadow);
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}
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static int gpio_read_reg(unsigned long reg, unsigned long reg_width,
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unsigned long field_width, unsigned long in_pos)
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{
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unsigned long data, mask, pos;
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data = 0;
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mask = (1 << field_width) - 1;
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pos = reg_width - ((in_pos + 1) * field_width);
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pr_debug("read_reg: addr = %lx, pos = %ld, "
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"r_width = %ld, f_width = %ld\n",
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reg, pos, reg_width, field_width);
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data = gpio_read_raw_reg(reg, reg_width);
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return (data >> pos) & mask;
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}
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static void gpio_write_reg(unsigned long reg, unsigned long reg_width,
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unsigned long field_width, unsigned long in_pos,
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unsigned long value)
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{
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unsigned long mask, pos;
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mask = (1 << field_width) - 1;
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pos = reg_width - ((in_pos + 1) * field_width);
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pr_debug("write_reg addr = %lx, value = %ld, pos = %ld, "
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"r_width = %ld, f_width = %ld\n",
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reg, value, pos, reg_width, field_width);
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mask = ~(mask << pos);
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value = value << pos;
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switch (reg_width) {
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case 8:
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__raw_writeb((__raw_readb(reg) & mask) | value, reg);
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break;
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case 16:
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__raw_writew((__raw_readw(reg) & mask) | value, reg);
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break;
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case 32:
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__raw_writel((__raw_readl(reg) & mask) | value, reg);
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break;
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}
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}
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static int setup_data_reg(struct pinmux_info *gpioc, unsigned gpio)
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{
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struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
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struct pinmux_data_reg *data_reg;
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int k, n;
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if (!enum_in_range(gpiop->enum_id, &gpioc->data))
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return -1;
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k = 0;
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while (1) {
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data_reg = gpioc->data_regs + k;
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if (!data_reg->reg_width)
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break;
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for (n = 0; n < data_reg->reg_width; n++) {
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if (data_reg->enum_ids[n] == gpiop->enum_id) {
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gpiop->flags &= ~PINMUX_FLAG_DREG;
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gpiop->flags |= (k << PINMUX_FLAG_DREG_SHIFT);
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gpiop->flags &= ~PINMUX_FLAG_DBIT;
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gpiop->flags |= (n << PINMUX_FLAG_DBIT_SHIFT);
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return 0;
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}
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}
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k++;
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}
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BUG();
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return -1;
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}
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static void setup_data_regs(struct pinmux_info *gpioc)
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{
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struct pinmux_data_reg *drp;
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int k;
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for (k = gpioc->first_gpio; k <= gpioc->last_gpio; k++)
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setup_data_reg(gpioc, k);
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k = 0;
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while (1) {
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drp = gpioc->data_regs + k;
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if (!drp->reg_width)
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break;
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drp->reg_shadow = gpio_read_raw_reg(drp->reg, drp->reg_width);
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k++;
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}
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}
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static int get_data_reg(struct pinmux_info *gpioc, unsigned gpio,
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struct pinmux_data_reg **drp, int *bitp)
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{
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struct pinmux_gpio *gpiop = &gpioc->gpios[gpio];
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int k, n;
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if (!enum_in_range(gpiop->enum_id, &gpioc->data))
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return -1;
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k = (gpiop->flags & PINMUX_FLAG_DREG) >> PINMUX_FLAG_DREG_SHIFT;
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n = (gpiop->flags & PINMUX_FLAG_DBIT) >> PINMUX_FLAG_DBIT_SHIFT;
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*drp = gpioc->data_regs + k;
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*bitp = n;
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return 0;
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}
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static int get_config_reg(struct pinmux_info *gpioc, pinmux_enum_t enum_id,
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struct pinmux_cfg_reg **crp, int *indexp,
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unsigned long **cntp)
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{
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struct pinmux_cfg_reg *config_reg;
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unsigned long r_width, f_width;
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int k, n;
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k = 0;
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while (1) {
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config_reg = gpioc->cfg_regs + k;
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r_width = config_reg->reg_width;
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f_width = config_reg->field_width;
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if (!r_width)
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break;
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for (n = 0; n < (r_width / f_width) * 1 << f_width; n++) {
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if (config_reg->enum_ids[n] == enum_id) {
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*crp = config_reg;
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*indexp = n;
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*cntp = &config_reg->cnt[n / (1 << f_width)];
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return 0;
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}
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}
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k++;
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}
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return -1;
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}
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static int get_gpio_enum_id(struct pinmux_info *gpioc, unsigned gpio,
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int pos, pinmux_enum_t *enum_idp)
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{
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pinmux_enum_t enum_id = gpioc->gpios[gpio].enum_id;
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pinmux_enum_t *data = gpioc->gpio_data;
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int k;
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if (!enum_in_range(enum_id, &gpioc->data)) {
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if (!enum_in_range(enum_id, &gpioc->mark)) {
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pr_err("non data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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}
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if (pos) {
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*enum_idp = data[pos + 1];
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return pos + 1;
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}
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for (k = 0; k < gpioc->gpio_data_size; k++) {
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if (data[k] == enum_id) {
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*enum_idp = data[k + 1];
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return k + 1;
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}
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}
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pr_err("cannot locate data/mark enum_id for gpio %d\n", gpio);
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return -1;
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}
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static void write_config_reg(struct pinmux_info *gpioc,
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struct pinmux_cfg_reg *crp,
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int index)
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{
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unsigned long ncomb, pos, value;
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ncomb = 1 << crp->field_width;
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pos = index / ncomb;
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value = index % ncomb;
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gpio_write_reg(crp->reg, crp->reg_width, crp->field_width, pos, value);
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}
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static int check_config_reg(struct pinmux_info *gpioc,
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struct pinmux_cfg_reg *crp,
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int index)
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{
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unsigned long ncomb, pos, value;
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ncomb = 1 << crp->field_width;
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pos = index / ncomb;
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value = index % ncomb;
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if (gpio_read_reg(crp->reg, crp->reg_width,
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crp->field_width, pos) == value)
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return 0;
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return -1;
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}
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enum { GPIO_CFG_DRYRUN, GPIO_CFG_REQ, GPIO_CFG_FREE };
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static int pinmux_config_gpio(struct pinmux_info *gpioc, unsigned gpio,
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int pinmux_type, int cfg_mode)
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{
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struct pinmux_cfg_reg *cr = NULL;
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pinmux_enum_t enum_id;
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struct pinmux_range *range;
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int in_range, pos, index;
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unsigned long *cntp;
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switch (pinmux_type) {
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case PINMUX_TYPE_FUNCTION:
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range = NULL;
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break;
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case PINMUX_TYPE_OUTPUT:
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range = &gpioc->output;
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break;
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case PINMUX_TYPE_INPUT:
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range = &gpioc->input;
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break;
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case PINMUX_TYPE_INPUT_PULLUP:
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range = &gpioc->input_pu;
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break;
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case PINMUX_TYPE_INPUT_PULLDOWN:
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range = &gpioc->input_pd;
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break;
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default:
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goto out_err;
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}
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pos = 0;
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enum_id = 0;
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index = 0;
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while (1) {
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pos = get_gpio_enum_id(gpioc, gpio, pos, &enum_id);
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if (pos <= 0)
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goto out_err;
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if (!enum_id)
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break;
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in_range = enum_in_range(enum_id, &gpioc->function);
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if (!in_range && range) {
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in_range = enum_in_range(enum_id, range);
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if (in_range && enum_id == range->force)
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continue;
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}
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if (!in_range)
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continue;
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if (get_config_reg(gpioc, enum_id, &cr, &index, &cntp) != 0)
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goto out_err;
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switch (cfg_mode) {
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case GPIO_CFG_DRYRUN:
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if (!*cntp || !check_config_reg(gpioc, cr, index))
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continue;
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break;
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case GPIO_CFG_REQ:
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write_config_reg(gpioc, cr, index);
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*cntp = *cntp + 1;
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break;
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case GPIO_CFG_FREE:
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*cntp = *cntp - 1;
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break;
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}
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}
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return 0;
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out_err:
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return -1;
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}
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static DEFINE_SPINLOCK(gpio_lock);
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static struct pinmux_info *chip_to_pinmux(struct gpio_chip *chip)
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{
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return container_of(chip, struct pinmux_info, chip);
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}
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static int sh_gpio_request(struct gpio_chip *chip, unsigned offset)
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{
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struct pinmux_info *gpioc = chip_to_pinmux(chip);
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struct pinmux_data_reg *dummy;
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unsigned long flags;
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int i, ret, pinmux_type;
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ret = -EINVAL;
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if (!gpioc)
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goto err_out;
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spin_lock_irqsave(&gpio_lock, flags);
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if ((gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE) != PINMUX_TYPE_NONE)
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goto err_unlock;
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/* setup pin function here if no data is associated with pin */
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if (get_data_reg(gpioc, offset, &dummy, &i) != 0)
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pinmux_type = PINMUX_TYPE_FUNCTION;
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else
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pinmux_type = PINMUX_TYPE_GPIO;
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if (pinmux_type == PINMUX_TYPE_FUNCTION) {
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if (pinmux_config_gpio(gpioc, offset,
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pinmux_type,
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GPIO_CFG_DRYRUN) != 0)
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goto err_unlock;
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if (pinmux_config_gpio(gpioc, offset,
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pinmux_type,
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GPIO_CFG_REQ) != 0)
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BUG();
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}
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gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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gpioc->gpios[offset].flags |= pinmux_type;
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ret = 0;
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err_unlock:
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spin_unlock_irqrestore(&gpio_lock, flags);
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err_out:
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return ret;
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}
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static void sh_gpio_free(struct gpio_chip *chip, unsigned offset)
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{
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struct pinmux_info *gpioc = chip_to_pinmux(chip);
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unsigned long flags;
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int pinmux_type;
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if (!gpioc)
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return;
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spin_lock_irqsave(&gpio_lock, flags);
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pinmux_type = gpioc->gpios[offset].flags & PINMUX_FLAG_TYPE;
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pinmux_config_gpio(gpioc, offset, pinmux_type, GPIO_CFG_FREE);
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gpioc->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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gpioc->gpios[offset].flags |= PINMUX_TYPE_NONE;
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spin_unlock_irqrestore(&gpio_lock, flags);
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}
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static int pinmux_direction(struct pinmux_info *gpioc,
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unsigned gpio, int new_pinmux_type)
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{
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int pinmux_type;
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int ret = -EINVAL;
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if (!gpioc)
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goto err_out;
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pinmux_type = gpioc->gpios[gpio].flags & PINMUX_FLAG_TYPE;
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switch (pinmux_type) {
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case PINMUX_TYPE_GPIO:
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break;
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case PINMUX_TYPE_OUTPUT:
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case PINMUX_TYPE_INPUT:
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case PINMUX_TYPE_INPUT_PULLUP:
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case PINMUX_TYPE_INPUT_PULLDOWN:
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pinmux_config_gpio(gpioc, gpio, pinmux_type, GPIO_CFG_FREE);
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break;
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default:
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goto err_out;
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}
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if (pinmux_config_gpio(gpioc, gpio,
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new_pinmux_type,
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GPIO_CFG_DRYRUN) != 0)
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goto err_out;
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if (pinmux_config_gpio(gpioc, gpio,
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new_pinmux_type,
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GPIO_CFG_REQ) != 0)
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BUG();
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gpioc->gpios[gpio].flags &= ~PINMUX_FLAG_TYPE;
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gpioc->gpios[gpio].flags |= new_pinmux_type;
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ret = 0;
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err_out:
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return ret;
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}
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static int sh_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
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{
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struct pinmux_info *gpioc = chip_to_pinmux(chip);
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unsigned long flags;
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int ret;
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spin_lock_irqsave(&gpio_lock, flags);
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ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_INPUT);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return ret;
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}
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static void sh_gpio_set_value(struct pinmux_info *gpioc,
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unsigned gpio, int value)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0)
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BUG();
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else
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gpio_write_bit(dr, bit, value);
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}
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static int sh_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
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int value)
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{
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struct pinmux_info *gpioc = chip_to_pinmux(chip);
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unsigned long flags;
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int ret;
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sh_gpio_set_value(gpioc, offset, value);
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spin_lock_irqsave(&gpio_lock, flags);
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ret = pinmux_direction(gpioc, offset, PINMUX_TYPE_OUTPUT);
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spin_unlock_irqrestore(&gpio_lock, flags);
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return ret;
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}
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static int sh_gpio_get_value(struct pinmux_info *gpioc, unsigned gpio)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (!gpioc || get_data_reg(gpioc, gpio, &dr, &bit) != 0) {
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BUG();
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return 0;
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}
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return gpio_read_reg(dr->reg, dr->reg_width, 1, bit);
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}
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static int sh_gpio_get(struct gpio_chip *chip, unsigned offset)
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{
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|
return sh_gpio_get_value(chip_to_pinmux(chip), offset);
|
|
}
|
|
|
|
static void sh_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
|
|
{
|
|
sh_gpio_set_value(chip_to_pinmux(chip), offset, value);
|
|
}
|
|
|
|
int register_pinmux(struct pinmux_info *pip)
|
|
{
|
|
struct gpio_chip *chip = &pip->chip;
|
|
|
|
pr_info("sh pinmux: %s handling gpio %d -> %d\n",
|
|
pip->name, pip->first_gpio, pip->last_gpio);
|
|
|
|
setup_data_regs(pip);
|
|
|
|
chip->request = sh_gpio_request;
|
|
chip->free = sh_gpio_free;
|
|
chip->direction_input = sh_gpio_direction_input;
|
|
chip->get = sh_gpio_get;
|
|
chip->direction_output = sh_gpio_direction_output;
|
|
chip->set = sh_gpio_set;
|
|
|
|
WARN_ON(pip->first_gpio != 0); /* needs testing */
|
|
|
|
chip->label = pip->name;
|
|
chip->owner = THIS_MODULE;
|
|
chip->base = pip->first_gpio;
|
|
chip->ngpio = (pip->last_gpio - pip->first_gpio) + 1;
|
|
|
|
return gpiochip_add(chip);
|
|
}
|