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b02914af4d
If userencounter the "Fatal DMA Problem" with a BCM43XX device, and still wish to use b43 as the driver, their only option is to rebuild the kernel with CONFIG_B43_FORCE_PIO. This patch removes this option and allows PIO mode to be selected with a load-time parameter for the module. Note that the configuration variable CONFIG_B43_PIO is also removed. Once the DMA problem with the BCM4312 devices is solved, this patch will likely be reverted. Signed-off-by: Larry Finger <Larry.Finger@lwfinger.net> Tested-by: John Daiker <daikerjohn@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
171 lines
4.6 KiB
C
171 lines
4.6 KiB
C
#ifndef B43_PIO_H_
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#define B43_PIO_H_
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#include "b43.h"
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/list.h>
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#include <linux/skbuff.h>
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/*** Registers for PIO queues up to revision 7. ***/
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/* TX queue. */
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#define B43_PIO_TXCTL 0x00
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#define B43_PIO_TXCTL_WRITELO 0x0001
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#define B43_PIO_TXCTL_WRITEHI 0x0002
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#define B43_PIO_TXCTL_EOF 0x0004
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#define B43_PIO_TXCTL_FREADY 0x0008
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#define B43_PIO_TXCTL_FLUSHREQ 0x0020
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#define B43_PIO_TXCTL_FLUSHPEND 0x0040
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#define B43_PIO_TXCTL_SUSPREQ 0x0080
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#define B43_PIO_TXCTL_QSUSP 0x0100
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#define B43_PIO_TXCTL_COMMCNT 0xFC00
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#define B43_PIO_TXCTL_COMMCNT_SHIFT 10
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#define B43_PIO_TXDATA 0x02
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#define B43_PIO_TXQBUFSIZE 0x04
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/* RX queue. */
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#define B43_PIO_RXCTL 0x00
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#define B43_PIO_RXCTL_FRAMERDY 0x0001
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#define B43_PIO_RXCTL_DATARDY 0x0002
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#define B43_PIO_RXDATA 0x02
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/*** Registers for PIO queues revision 8 and later. ***/
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/* TX queue */
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#define B43_PIO8_TXCTL 0x00
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#define B43_PIO8_TXCTL_0_7 0x00000001
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#define B43_PIO8_TXCTL_8_15 0x00000002
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#define B43_PIO8_TXCTL_16_23 0x00000004
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#define B43_PIO8_TXCTL_24_31 0x00000008
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#define B43_PIO8_TXCTL_EOF 0x00000010
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#define B43_PIO8_TXCTL_FREADY 0x00000080
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#define B43_PIO8_TXCTL_SUSPREQ 0x00000100
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#define B43_PIO8_TXCTL_QSUSP 0x00000200
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#define B43_PIO8_TXCTL_FLUSHREQ 0x00000400
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#define B43_PIO8_TXCTL_FLUSHPEND 0x00000800
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#define B43_PIO8_TXDATA 0x04
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/* RX queue */
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#define B43_PIO8_RXCTL 0x00
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#define B43_PIO8_RXCTL_FRAMERDY 0x00000001
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#define B43_PIO8_RXCTL_DATARDY 0x00000002
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#define B43_PIO8_RXDATA 0x04
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/* The maximum number of TX-packets the HW can handle. */
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#define B43_PIO_MAX_NR_TXPACKETS 32
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struct b43_pio_txpacket {
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/* Pointer to the TX queue we belong to. */
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struct b43_pio_txqueue *queue;
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/* The TX data packet. */
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struct sk_buff *skb;
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/* Index in the (struct b43_pio_txqueue)->packets array. */
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u8 index;
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struct list_head list;
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};
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struct b43_pio_txqueue {
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struct b43_wldev *dev;
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u16 mmio_base;
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/* The device queue buffer size in bytes. */
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u16 buffer_size;
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/* The number of used bytes in the device queue buffer. */
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u16 buffer_used;
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/* The number of packets that can still get queued.
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* This is decremented on queueing a packet and incremented
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* after receiving the transmit status. */
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u16 free_packet_slots;
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/* True, if the mac80211 queue was stopped due to overflow at TX. */
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bool stopped;
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/* Our b43 queue index number */
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u8 index;
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/* The mac80211 QoS queue priority. */
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u8 queue_prio;
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/* Buffer for TX packet meta data. */
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struct b43_pio_txpacket packets[B43_PIO_MAX_NR_TXPACKETS];
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struct list_head packets_list;
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/* Total number of transmitted packets. */
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unsigned int nr_tx_packets;
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/* Shortcut to the 802.11 core revision. This is to
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* avoid horrible pointer dereferencing in the fastpaths. */
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u8 rev;
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};
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struct b43_pio_rxqueue {
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struct b43_wldev *dev;
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u16 mmio_base;
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/* Shortcut to the 802.11 core revision. This is to
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* avoid horrible pointer dereferencing in the fastpaths. */
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u8 rev;
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};
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static inline u16 b43_piotx_read16(struct b43_pio_txqueue *q, u16 offset)
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{
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return b43_read16(q->dev, q->mmio_base + offset);
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}
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static inline u32 b43_piotx_read32(struct b43_pio_txqueue *q, u16 offset)
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{
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return b43_read32(q->dev, q->mmio_base + offset);
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}
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static inline void b43_piotx_write16(struct b43_pio_txqueue *q,
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u16 offset, u16 value)
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{
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b43_write16(q->dev, q->mmio_base + offset, value);
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}
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static inline void b43_piotx_write32(struct b43_pio_txqueue *q,
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u16 offset, u32 value)
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{
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b43_write32(q->dev, q->mmio_base + offset, value);
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}
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static inline u16 b43_piorx_read16(struct b43_pio_rxqueue *q, u16 offset)
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{
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return b43_read16(q->dev, q->mmio_base + offset);
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}
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static inline u32 b43_piorx_read32(struct b43_pio_rxqueue *q, u16 offset)
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{
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return b43_read32(q->dev, q->mmio_base + offset);
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}
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static inline void b43_piorx_write16(struct b43_pio_rxqueue *q,
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u16 offset, u16 value)
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{
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b43_write16(q->dev, q->mmio_base + offset, value);
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}
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static inline void b43_piorx_write32(struct b43_pio_rxqueue *q,
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u16 offset, u32 value)
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{
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b43_write32(q->dev, q->mmio_base + offset, value);
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}
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int b43_pio_init(struct b43_wldev *dev);
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void b43_pio_free(struct b43_wldev *dev);
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int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb);
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void b43_pio_handle_txstatus(struct b43_wldev *dev,
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const struct b43_txstatus *status);
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void b43_pio_get_tx_stats(struct b43_wldev *dev,
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struct ieee80211_tx_queue_stats *stats);
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void b43_pio_rx(struct b43_pio_rxqueue *q);
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void b43_pio_tx_suspend(struct b43_wldev *dev);
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void b43_pio_tx_resume(struct b43_wldev *dev);
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#endif /* B43_PIO_H_ */
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