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- More changes for HS48 cores: supporting MMUv5, detecting new micro-arch gizmos - axs10x platform wiring up reset driver merged in this cycle - ARC perf driver optimizations -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJaFdirAAoJEGnX8d3iisJe7bcP/iKL3sfCHwzgQQ4jUvm32PfL /YlMXk6+YhboGb1txrEOyot1ZIAFNpHrKLunhkkHSlKxySxRZ29+umWBQfIy7MN/ 2YrBfpCXwugwajA00PD45uv340QJtTa9UkR9WMVH0XDtTtgpUy3rm6Ee1nt6+elF M7BEZgfD5LgMP0eKgHVkZwK3OT/oYm+a5M8bjCdSKuwjtrd4W3ZC9WPv1mZLjAAO S5DDfa+TeufublqJviZzQmLXipFvluBdGbzANJpkAYMnE82vKkrlqAWQSEJ5kwRn 3mbFOze8sFPUlo5uji6Z9Sf2a/G9e3PX5d6xPIQcNaNFxdyVrr4VDLQII6ulJcBj dlS6TPg3/5UerhiGwUnJfIQxlqw/Ebn4RvgzksxX8+ujjjvd2kY3DCFVzjlKaenh Bwo0kyLhCJKHSInKvW4r6W2ZnBW6VWoGST/KYwgZJwTeoxl043BRA2AoNKKiolJJ d5vyonUXjIddUtcwO3vt/xx1lqKf49ZK0Bx8EGDMYHhZwpGt13geZme7b5H975oB uPM+m9vPyiyiD2HziAydvoLT+uCyRSFObHKcQLs+1E+QSw/tzrQgNsMTwhSPtg/g Uwt/KU+cCnLeksGRuB4LgSp/7nbhB6PGVzUeRCo2VVls875TRQxPEjJ1rZ2kd9JO IVpYxDlu+4cKsRDK/EIl =LX+r -----END PGP SIGNATURE----- Merge tag 'arc-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc Pull ARC updates from Vineet Gupta: - more changes for HS48 cores: supporting MMUv5, detecting new micro-arch gizmos - axs10x platform wiring up reset driver merged in this cycle - ARC perf driver optimizations * tag 'arc-4.15-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc: ARC: perf: avoid vmalloc backed mmap ARCv2: perf: optimize given that num counters <= 32 ARCv2: perf: tweak overflow interrupt ARC: [plat-axs10x] DTS: Add reset controller node to manage ethernet reset ARCv2: boot log: updates for HS48: dual-issue, ECC, Loop Buffer ARCv2: Accomodate HS48 MMUv5 by relaxing MMU ver checking ARC: [plat-axs10x] auto-select AXS101 or AXS103 given the ISA config |
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