mirror of
https://github.com/edk2-porting/linux-next.git
synced 2024-12-27 22:53:55 +08:00
c6a57a50ad
Add HDMI HDCP support including HDCP PartI/II/III authentication.
V1: Initial Change
V2: Address Bjorn&Rob's comments
Refactor the authentication process to use single work instead
of multiple work for different authentication stages.
V3: Update to align with qcom SCM api.
Signed-off-by: Jilai Wang <jilaiw@codeaurora.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
57 lines
1.4 KiB
Plaintext
57 lines
1.4 KiB
Plaintext
|
|
config DRM_MSM
|
|
tristate "MSM DRM"
|
|
depends on DRM
|
|
depends on ARCH_QCOM || (ARM && COMPILE_TEST)
|
|
depends on OF && COMMON_CLK
|
|
select REGULATOR
|
|
select DRM_KMS_HELPER
|
|
select DRM_PANEL
|
|
select SHMEM
|
|
select TMPFS
|
|
select QCOM_SCM
|
|
default y
|
|
help
|
|
DRM/KMS driver for MSM/snapdragon.
|
|
|
|
config DRM_MSM_FBDEV
|
|
bool "Enable legacy fbdev support for MSM modesetting driver"
|
|
depends on DRM_MSM
|
|
select DRM_KMS_FB_HELPER
|
|
select FB_SYS_FILLRECT
|
|
select FB_SYS_COPYAREA
|
|
select FB_SYS_IMAGEBLIT
|
|
select FB_SYS_FOPS
|
|
default y
|
|
help
|
|
Choose this option if you have a need for the legacy fbdev
|
|
support. Note that this support also provide the linux console
|
|
support on top of the MSM modesetting driver.
|
|
|
|
config DRM_MSM_REGISTER_LOGGING
|
|
bool "MSM DRM register logging"
|
|
depends on DRM_MSM
|
|
default n
|
|
help
|
|
Compile in support for logging register reads/writes in a format
|
|
that can be parsed by envytools demsm tool. If enabled, register
|
|
logging can be switched on via msm.reglog=y module param.
|
|
|
|
config DRM_MSM_DSI
|
|
bool "Enable DSI support in MSM DRM driver"
|
|
depends on DRM_MSM
|
|
select DRM_PANEL
|
|
select DRM_MIPI_DSI
|
|
default y
|
|
help
|
|
Choose this option if you have a need for MIPI DSI connector
|
|
support.
|
|
|
|
config DRM_MSM_DSI_PLL
|
|
bool "Enable DSI PLL driver in MSM DRM"
|
|
depends on DRM_MSM_DSI && COMMON_CLK
|
|
default y
|
|
help
|
|
Choose this option to enable DSI PLL driver which provides DSI
|
|
source clocks under common clock framework.
|