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af3cfdbf56
ARM64_CPU_SUSPEND config option was introduced to make code providing context save/restore selectable only on platforms requiring power management capabilities. Currently ARM64_CPU_SUSPEND depends on the PM_SLEEP config option which in turn is set by the SUSPEND config option. The introduction of CPU_IDLE for arm64 requires that code configured by ARM64_CPU_SUSPEND (context save/restore) should be compiled in in order to enable the CPU idle driver to rely on CPU operations carrying out context save/restore. The ARM64_CPUIDLE config option (ARM64 generic idle driver) is therefore forced to select ARM64_CPU_SUSPEND, even if there may be (ie PM_SLEEP) failed dependencies, which is not a clean way of handling the kernel configuration option. For these reasons, this patch removes the ARM64_CPU_SUSPEND config option and makes the context save/restore dependent on CPU_PM, which is selected whenever either SUSPEND or CPU_IDLE are configured, cleaning up dependencies in the process. This way, code previously configured through ARM64_CPU_SUSPEND is compiled in whenever a power management subsystem requires it to be present in the kernel (SUSPEND || CPU_IDLE), which is the behaviour expected on ARM64 kernels. The cpu_suspend and cpu_init_idle CPU operations are added only if CPU_IDLE is selected, since they are CPU_IDLE specific methods and should be grouped and defined accordingly. PSCI CPU operations are updated to reflect the introduced changes. Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Will Deacon <will.deacon@arm.com> Cc: Krzysztof Kozlowski <k.kozlowski@samsung.com> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
142 lines
4.1 KiB
C
142 lines
4.1 KiB
C
#include <linux/percpu.h>
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#include <linux/slab.h>
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#include <asm/cacheflush.h>
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#include <asm/debug-monitors.h>
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#include <asm/pgtable.h>
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#include <asm/memory.h>
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#include <asm/mmu_context.h>
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#include <asm/smp_plat.h>
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#include <asm/suspend.h>
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#include <asm/tlbflush.h>
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extern int __cpu_suspend_enter(unsigned long arg, int (*fn)(unsigned long));
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/*
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* This is called by __cpu_suspend_enter() to save the state, and do whatever
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* flushing is required to ensure that when the CPU goes to sleep we have
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* the necessary data available when the caches are not searched.
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*
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* ptr: CPU context virtual address
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* save_ptr: address of the location where the context physical address
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* must be saved
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*/
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void notrace __cpu_suspend_save(struct cpu_suspend_ctx *ptr,
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phys_addr_t *save_ptr)
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{
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*save_ptr = virt_to_phys(ptr);
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cpu_do_suspend(ptr);
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/*
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* Only flush the context that must be retrieved with the MMU
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* off. VA primitives ensure the flush is applied to all
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* cache levels so context is pushed to DRAM.
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*/
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__flush_dcache_area(ptr, sizeof(*ptr));
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__flush_dcache_area(save_ptr, sizeof(*save_ptr));
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}
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/*
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* This hook is provided so that cpu_suspend code can restore HW
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* breakpoints as early as possible in the resume path, before reenabling
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* debug exceptions. Code cannot be run from a CPU PM notifier since by the
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* time the notifier runs debug exceptions might have been enabled already,
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* with HW breakpoints registers content still in an unknown state.
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*/
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void (*hw_breakpoint_restore)(void *);
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void __init cpu_suspend_set_dbg_restorer(void (*hw_bp_restore)(void *))
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{
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/* Prevent multiple restore hook initializations */
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if (WARN_ON(hw_breakpoint_restore))
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return;
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hw_breakpoint_restore = hw_bp_restore;
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}
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/*
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* __cpu_suspend
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*
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* arg: argument to pass to the finisher function
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* fn: finisher function pointer
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*
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*/
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int __cpu_suspend(unsigned long arg, int (*fn)(unsigned long))
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{
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struct mm_struct *mm = current->active_mm;
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int ret;
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unsigned long flags;
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/*
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* From this point debug exceptions are disabled to prevent
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* updates to mdscr register (saved and restored along with
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* general purpose registers) from kernel debuggers.
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*/
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local_dbg_save(flags);
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/*
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* mm context saved on the stack, it will be restored when
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* the cpu comes out of reset through the identity mapped
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* page tables, so that the thread address space is properly
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* set-up on function return.
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*/
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ret = __cpu_suspend_enter(arg, fn);
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if (ret == 0) {
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/*
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* We are resuming from reset with TTBR0_EL1 set to the
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* idmap to enable the MMU; restore the active_mm mappings in
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* TTBR0_EL1 unless the active_mm == &init_mm, in which case
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* the thread entered __cpu_suspend with TTBR0_EL1 set to
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* reserved TTBR0 page tables and should be restored as such.
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*/
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if (mm == &init_mm)
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cpu_set_reserved_ttbr0();
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else
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cpu_switch_mm(mm->pgd, mm);
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flush_tlb_all();
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/*
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* Restore per-cpu offset before any kernel
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* subsystem relying on it has a chance to run.
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*/
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set_my_cpu_offset(per_cpu_offset(smp_processor_id()));
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/*
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* Restore HW breakpoint registers to sane values
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* before debug exceptions are possibly reenabled
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* through local_dbg_restore.
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*/
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if (hw_breakpoint_restore)
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hw_breakpoint_restore(NULL);
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}
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/*
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* Restore pstate flags. OS lock and mdscr have been already
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* restored, so from this point onwards, debugging is fully
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* renabled if it was enabled when core started shutdown.
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*/
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local_dbg_restore(flags);
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return ret;
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}
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struct sleep_save_sp sleep_save_sp;
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phys_addr_t sleep_idmap_phys;
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static int __init cpu_suspend_init(void)
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{
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void *ctx_ptr;
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/* ctx_ptr is an array of physical addresses */
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ctx_ptr = kcalloc(mpidr_hash_size(), sizeof(phys_addr_t), GFP_KERNEL);
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if (WARN_ON(!ctx_ptr))
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return -ENOMEM;
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sleep_save_sp.save_ptr_stash = ctx_ptr;
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sleep_save_sp.save_ptr_stash_phys = virt_to_phys(ctx_ptr);
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sleep_idmap_phys = virt_to_phys(idmap_pg_dir);
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__flush_dcache_area(&sleep_save_sp, sizeof(struct sleep_save_sp));
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__flush_dcache_area(&sleep_idmap_phys, sizeof(sleep_idmap_phys));
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return 0;
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}
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early_initcall(cpu_suspend_init);
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