Maciej W. Rozycki c491cfa2ca MIPS: math-emu: Implement the FCCR, FEXR and FENR registers ... Implement the FCCR, FEXR and FENR "shadow" FPU registers for the architecture levels that include them, for the CFC1 and CTC1 instructions in the full emulation mode. For completeness add macros for the CP1 UFR and UNFR registers too, no actual implementation though. Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/9708/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>		2015-04-08 01:10:28 +02:00
..
asm	MIPS: math-emu: Implement the FCCR, FEXR and FENR registers	2015-04-08 01:10:28 +02:00
uapi/asm	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	2015-02-21 19:41:38 -08:00