mirror of
https://github.com/edk2-porting/linux-next.git
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63e30271b0
Enumeration Disable IO/MEM decoding for devices with non-compliant BARs (Bjorn Helgaas) Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs (Bjorn Helgaas Resource management Mark shadow copy of VGA ROM as IORESOURCE_PCI_FIXED (Bjorn Helgaas) Don't assign or reassign immutable resources (Bjorn Helgaas) Don't enable/disable ROM BAR if we're using a RAM shadow copy (Bjorn Helgaas) Set ROM shadow location in arch code, not in PCI core (Bjorn Helgaas) Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs (Bjorn Helgaas) ia64: Use ioremap() instead of open-coded equivalent (Bjorn Helgaas) ia64: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) MIPS: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY (Bjorn Helgaas) Don't leak memory if sysfs_create_bin_file() fails (Bjorn Helgaas) rcar: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) designware: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) Virtualization Wait for up to 1000ms after FLR reset (Alex Williamson) Support SR-IOV on any function type (Kelly Zytaruk) Add ACS quirk for all Cavium devices (Manish Jaggi) AER Rename pci_ops_aer to aer_inj_pci_ops (Bjorn Helgaas) Restore pci_ops pointer while calling original pci_ops (David Daney) Fix aer_inject error codes (Jean Delvare) Use dev_warn() in aer_inject (Jean Delvare) Log actual error causes in aer_inject (Jean Delvare) Log aer_inject error injections (Jean Delvare) VPD Prevent VPD access for buggy devices (Babu Moger) Move pci_read_vpd() and pci_write_vpd() close to other VPD code (Bjorn Helgaas) Move pci_vpd_release() from header file to pci/access.c (Bjorn Helgaas) Remove struct pci_vpd_ops.release function pointer (Bjorn Helgaas) Rename VPD symbols to remove unnecessary "pci22" (Bjorn Helgaas) Fold struct pci_vpd_pci22 into struct pci_vpd (Bjorn Helgaas) Sleep rather than busy-wait for VPD access completion (Bjorn Helgaas) Update VPD definitions (Hannes Reinecke) Allow access to VPD attributes with size 0 (Hannes Reinecke) Determine actual VPD size on first access (Hannes Reinecke) Generic host bridge driver Move structure definitions to separate header file (David Daney) Add pci_host_common_probe(), based on gen_pci_probe() (David Daney) Expose pci_host_common_probe() for use by other drivers (David Daney) Altera host bridge driver Fix altera_pcie_link_is_up() (Ley Foon Tan) Cavium ThunderX host bridge driver Add PCIe host driver for ThunderX processors (David Daney) Add driver for ThunderX-pass{1,2} on-chip devices (David Daney) Freescale i.MX6 host bridge driver Add DT bindings to configure PHY Tx driver settings (Justin Waters) Move imx6_pcie_reset_phy() near other PHY handling functions (Lucas Stach) Move PHY reset into imx6_pcie_establish_link() (Lucas Stach) Remove broken Gen2 workaround (Lucas Stach) Move link up check into imx6_pcie_wait_for_link() (Lucas Stach) Freescale Layerscape host bridge driver Add "fsl,ls2085a-pcie" compatible ID (Yang Shi) Intel VMD host bridge driver Attach VMD resources to parent domain's resource tree (Jon Derrick) Set bus resource start to 0 (Keith Busch) Microsoft Hyper-V host bridge driver Add fwnode_handle to x86 pci_sysdata (Jake Oshins) Look up IRQ domain by fwnode_handle (Jake Oshins) Add paravirtual PCI front-end for Microsoft Hyper-V VMs (Jake Oshins) NVIDIA Tegra host bridge driver Add pci_ops.{add,remove}_bus() callbacks (Thierry Reding) Implement ->{add,remove}_bus() callbacks (Thierry Reding) Remove unused struct tegra_pcie.num_ports field (Thierry Reding) Track bus -> CPU mapping (Thierry Reding) Remove misleading PHYS_OFFSET (Thierry Reding) Renesas R-Car host bridge driver Depend on ARCH_RENESAS, not ARCH_SHMOBILE (Simon Horman) Synopsys DesignWare host bridge driver ARC: Add PCI support (Joao Pinto) Add generic dw_pcie_wait_for_link() (Joao Pinto) Add default link up check if sub-driver doesn't override (Joao Pinto) Add driver for prototyping kits based on ARC SDP (Joao Pinto) TI Keystone host bridge driver Defer probing if devm_phy_get() returns -EPROBE_DEFER (Shawn Lin) Xilinx AXI host bridge driver Use of_pci_get_host_bridge_resources() to parse DT (Bharat Kumar Gogada) Remove dependency on ARM-specific struct hw_pci (Bharat Kumar Gogada) Don't call pci_fixup_irqs() on Microblaze (Bharat Kumar Gogada) Update Zynq binding with Microblaze node (Bharat Kumar Gogada) microblaze: Support generic Xilinx AXI PCIe Host Bridge IP driver (Bharat Kumar Gogada) Xilinx NWL host bridge driver Add support for Xilinx NWL PCIe Host Controller (Bharat Kumar Gogada) Miscellaneous Check device_attach() return value always (Bjorn Helgaas) Move pci_set_flags() from asm-generic/pci-bridge.h to linux/pci.h (Bjorn Helgaas) Remove includes of empty asm-generic/pci-bridge.h (Bjorn Helgaas) ARM64: Remove generated include of asm-generic/pci-bridge.h (Bjorn Helgaas) Remove empty asm-generic/pci-bridge.h (Bjorn Helgaas) Remove includes of asm/pci-bridge.h (Bjorn Helgaas) Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h (Bjorn Helgaas) unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition (Bjorn Helgaas) Cleanup pci/pcie/Kconfig whitespace (Andreas Ziegler) Include pci/hotplug Kconfig directly from pci/Kconfig (Bjorn Helgaas) Include pci/pcie/Kconfig directly from pci/Kconfig (Bogicevic Sasa) frv: Remove stray pci_{alloc,free}_consistent() declaration (Christoph Hellwig) Move pci_dma_* helpers to common code (Christoph Hellwig) Add PCI_CLASS_SERIAL_USB_DEVICE definition (Heikki Krogerus) Add QEMU top-level IDs for (sub)vendor & device (Robin H. Johnson) Fix broken URL for Dell biosdevname (Naga Venkata Sai Indubhaskar Jupudi) -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iQIcBAABAgAGBQJW6XgMAAoJEFmIoMA60/r8Yq4P/1nNwwZPikU+9Z8k0HyGPll6 vqXBOYj/wlbAxJTzH2weaoyUamFrwvsKaO3Vap3xHkAeTFPD/Dp0TipCCNMrZ82Z j1y83JJpenkRyX6ifLARCNYpOtvnvgzSrO9x7Sb2Xfqb64dPb7+jGAfOpGNzhKsO n1nj/L7RGx8Q6fNFGf8ANMXKTsdkdL+1pdwegjUXmD5WdOT+oW8DmqVbhyfSKwl0 E8r4Ml2lIg7Qd5Wu5iKMIBsR0+5HEyrwV7ch92wXChwKfoRwG70qnn7FGdc0y5ZB XvJuj8UD5UeMxEUeoRa9SwU6wWQT3Q9e6BzMS+P+43z36SPYjMfy/Xffv054z/bY rQomLjuGxNLESpmfNK5JfKxWoe2YNXjHQIDWMrAHyNlwdKJbYiwPcxnZJhvOa/eB p0QYcGS7O43STjibG9PZhzeq8tuSJRshxi0W6iB9QlqO8qs8nJQxIO+sZj/vl4yz lSnswWcV9062KITl8Fe9xDw244/RTz1xSVCdldlSoDhJyeMOjRvzS8raUMyyVmbA YULsI3l2iCl+fwDm/T21o7hJG966oYdAmgEv7lc7BWfgEAMg//LZXvMzVvrPFB2D R77u/0idtOciVJrmnO/x9DnQO2hzro9SLmVH6m0+0YU4wSSpZfGn98PCrtkatOAU c8zT9dJgyJVE3Z7cnPJ4 =otsF -----END PGP SIGNATURE----- Merge tag 'pci-v4.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull PCI updates from Bjorn Helgaas: "PCI changes for v4.6: Enumeration: - Disable IO/MEM decoding for devices with non-compliant BARs (Bjorn Helgaas) - Mark Broadwell-EP Home Agent & PCU as having non-compliant BARs (Bjorn Helgaas Resource management: - Mark shadow copy of VGA ROM as IORESOURCE_PCI_FIXED (Bjorn Helgaas) - Don't assign or reassign immutable resources (Bjorn Helgaas) - Don't enable/disable ROM BAR if we're using a RAM shadow copy (Bjorn Helgaas) - Set ROM shadow location in arch code, not in PCI core (Bjorn Helgaas) - Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs (Bjorn Helgaas) - ia64: Use ioremap() instead of open-coded equivalent (Bjorn Helgaas) - ia64: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) - MIPS: Keep CPU physical (not virtual) addresses in shadow ROM resource (Bjorn Helgaas) - Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY (Bjorn Helgaas) - Don't leak memory if sysfs_create_bin_file() fails (Bjorn Helgaas) - rcar: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) - designware: Remove PCI_PROBE_ONLY handling (Lorenzo Pieralisi) Virtualization: - Wait for up to 1000ms after FLR reset (Alex Williamson) - Support SR-IOV on any function type (Kelly Zytaruk) - Add ACS quirk for all Cavium devices (Manish Jaggi) AER: - Rename pci_ops_aer to aer_inj_pci_ops (Bjorn Helgaas) - Restore pci_ops pointer while calling original pci_ops (David Daney) - Fix aer_inject error codes (Jean Delvare) - Use dev_warn() in aer_inject (Jean Delvare) - Log actual error causes in aer_inject (Jean Delvare) - Log aer_inject error injections (Jean Delvare) VPD: - Prevent VPD access for buggy devices (Babu Moger) - Move pci_read_vpd() and pci_write_vpd() close to other VPD code (Bjorn Helgaas) - Move pci_vpd_release() from header file to pci/access.c (Bjorn Helgaas) - Remove struct pci_vpd_ops.release function pointer (Bjorn Helgaas) - Rename VPD symbols to remove unnecessary "pci22" (Bjorn Helgaas) - Fold struct pci_vpd_pci22 into struct pci_vpd (Bjorn Helgaas) - Sleep rather than busy-wait for VPD access completion (Bjorn Helgaas) - Update VPD definitions (Hannes Reinecke) - Allow access to VPD attributes with size 0 (Hannes Reinecke) - Determine actual VPD size on first access (Hannes Reinecke) Generic host bridge driver: - Move structure definitions to separate header file (David Daney) - Add pci_host_common_probe(), based on gen_pci_probe() (David Daney) - Expose pci_host_common_probe() for use by other drivers (David Daney) Altera host bridge driver: - Fix altera_pcie_link_is_up() (Ley Foon Tan) Cavium ThunderX host bridge driver: - Add PCIe host driver for ThunderX processors (David Daney) - Add driver for ThunderX-pass{1,2} on-chip devices (David Daney) Freescale i.MX6 host bridge driver: - Add DT bindings to configure PHY Tx driver settings (Justin Waters) - Move imx6_pcie_reset_phy() near other PHY handling functions (Lucas Stach) - Move PHY reset into imx6_pcie_establish_link() (Lucas Stach) - Remove broken Gen2 workaround (Lucas Stach) - Move link up check into imx6_pcie_wait_for_link() (Lucas Stach) Freescale Layerscape host bridge driver: - Add "fsl,ls2085a-pcie" compatible ID (Yang Shi) Intel VMD host bridge driver: - Attach VMD resources to parent domain's resource tree (Jon Derrick) - Set bus resource start to 0 (Keith Busch) Microsoft Hyper-V host bridge driver: - Add fwnode_handle to x86 pci_sysdata (Jake Oshins) - Look up IRQ domain by fwnode_handle (Jake Oshins) - Add paravirtual PCI front-end for Microsoft Hyper-V VMs (Jake Oshins) NVIDIA Tegra host bridge driver: - Add pci_ops.{add,remove}_bus() callbacks (Thierry Reding) - Implement ->{add,remove}_bus() callbacks (Thierry Reding) - Remove unused struct tegra_pcie.num_ports field (Thierry Reding) - Track bus -> CPU mapping (Thierry Reding) - Remove misleading PHYS_OFFSET (Thierry Reding) Renesas R-Car host bridge driver: - Depend on ARCH_RENESAS, not ARCH_SHMOBILE (Simon Horman) Synopsys DesignWare host bridge driver: - ARC: Add PCI support (Joao Pinto) - Add generic dw_pcie_wait_for_link() (Joao Pinto) - Add default link up check if sub-driver doesn't override (Joao Pinto) - Add driver for prototyping kits based on ARC SDP (Joao Pinto) TI Keystone host bridge driver: - Defer probing if devm_phy_get() returns -EPROBE_DEFER (Shawn Lin) Xilinx AXI host bridge driver: - Use of_pci_get_host_bridge_resources() to parse DT (Bharat Kumar Gogada) - Remove dependency on ARM-specific struct hw_pci (Bharat Kumar Gogada) - Don't call pci_fixup_irqs() on Microblaze (Bharat Kumar Gogada) - Update Zynq binding with Microblaze node (Bharat Kumar Gogada) - microblaze: Support generic Xilinx AXI PCIe Host Bridge IP driver (Bharat Kumar Gogada) Xilinx NWL host bridge driver: - Add support for Xilinx NWL PCIe Host Controller (Bharat Kumar Gogada) Miscellaneous: - Check device_attach() return value always (Bjorn Helgaas) - Move pci_set_flags() from asm-generic/pci-bridge.h to linux/pci.h (Bjorn Helgaas) - Remove includes of empty asm-generic/pci-bridge.h (Bjorn Helgaas) - ARM64: Remove generated include of asm-generic/pci-bridge.h (Bjorn Helgaas) - Remove empty asm-generic/pci-bridge.h (Bjorn Helgaas) - Remove includes of asm/pci-bridge.h (Bjorn Helgaas) - Consolidate PCI DMA constants and interfaces in linux/pci-dma-compat.h (Bjorn Helgaas) - unicore32: Remove unused HAVE_ARCH_PCI_SET_DMA_MASK definition (Bjorn Helgaas) - Cleanup pci/pcie/Kconfig whitespace (Andreas Ziegler) - Include pci/hotplug Kconfig directly from pci/Kconfig (Bjorn Helgaas) - Include pci/pcie/Kconfig directly from pci/Kconfig (Bogicevic Sasa) - frv: Remove stray pci_{alloc,free}_consistent() declaration (Christoph Hellwig) - Move pci_dma_* helpers to common code (Christoph Hellwig) - Add PCI_CLASS_SERIAL_USB_DEVICE definition (Heikki Krogerus) - Add QEMU top-level IDs for (sub)vendor & device (Robin H. Johnson) - Fix broken URL for Dell biosdevname (Naga Venkata Sai Indubhaskar Jupudi)" * tag 'pci-v4.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (94 commits) PCI: Add PCI_CLASS_SERIAL_USB_DEVICE definition PCI: designware: Add driver for prototyping kits based on ARC SDP PCI: designware: Add default link up check if sub-driver doesn't override PCI: designware: Add generic dw_pcie_wait_for_link() PCI: Cleanup pci/pcie/Kconfig whitespace PCI: Simplify pci_create_attr() control flow PCI: Don't leak memory if sysfs_create_bin_file() fails PCI: Simplify sysfs ROM cleanup PCI: Remove unused IORESOURCE_ROM_COPY and IORESOURCE_ROM_BIOS_COPY MIPS: Loongson 3: Keep CPU physical (not virtual) addresses in shadow ROM resource MIPS: Loongson 3: Use temporary struct resource * to avoid repetition ia64/PCI: Keep CPU physical (not virtual) addresses in shadow ROM resource ia64/PCI: Use ioremap() instead of open-coded equivalent ia64/PCI: Use temporary struct resource * to avoid repetition PCI: Clean up pci_map_rom() whitespace PCI: Remove arch-specific IORESOURCE_ROM_SHADOW size from sysfs PCI: thunder: Add driver for ThunderX-pass{1,2} on-chip devices PCI: thunder: Add PCIe host driver for ThunderX processors PCI: generic: Expose pci_host_common_probe() for use by other drivers PCI: generic: Add pci_host_common_probe(), based on gen_pci_probe() ...
738 lines
17 KiB
C
738 lines
17 KiB
C
/*
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* Low-Level PCI Support for PC
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*
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* (c) 1999--2000 Martin Mares <mj@ucw.cz>
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*/
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#include <linux/sched.h>
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#include <linux/pci.h>
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#include <linux/pci-acpi.h>
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#include <linux/ioport.h>
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#include <linux/init.h>
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#include <linux/dmi.h>
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#include <linux/slab.h>
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#include <asm/acpi.h>
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#include <asm/segment.h>
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#include <asm/io.h>
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#include <asm/smp.h>
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#include <asm/pci_x86.h>
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#include <asm/setup.h>
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unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
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PCI_PROBE_MMCONF;
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unsigned int pci_early_dump_regs;
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static int pci_bf_sort;
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static int smbios_type_b1_flag;
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int pci_routeirq;
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int noioapicquirk;
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#ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
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int noioapicreroute = 0;
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#else
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int noioapicreroute = 1;
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#endif
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int pcibios_last_bus = -1;
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unsigned long pirq_table_addr;
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const struct pci_raw_ops *__read_mostly raw_pci_ops;
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const struct pci_raw_ops *__read_mostly raw_pci_ext_ops;
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int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 *val)
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{
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if (domain == 0 && reg < 256 && raw_pci_ops)
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return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
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if (raw_pci_ext_ops)
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return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
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return -EINVAL;
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}
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int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
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int reg, int len, u32 val)
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{
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if (domain == 0 && reg < 256 && raw_pci_ops)
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return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
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if (raw_pci_ext_ops)
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return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
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return -EINVAL;
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}
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static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
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{
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return raw_pci_read(pci_domain_nr(bus), bus->number,
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devfn, where, size, value);
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}
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static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
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{
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return raw_pci_write(pci_domain_nr(bus), bus->number,
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devfn, where, size, value);
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}
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struct pci_ops pci_root_ops = {
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.read = pci_read,
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.write = pci_write,
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};
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/*
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* This interrupt-safe spinlock protects all accesses to PCI
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* configuration space.
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*/
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DEFINE_RAW_SPINLOCK(pci_config_lock);
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static int __init can_skip_ioresource_align(const struct dmi_system_id *d)
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{
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pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
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printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
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return 0;
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}
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static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __initconst = {
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/*
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* Systems where PCI IO resource ISA alignment can be skipped
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* when the ISA enable bit in the bridge control is not set
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*/
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{
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.callback = can_skip_ioresource_align,
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.ident = "IBM System x3800",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
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DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
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},
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},
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{
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.callback = can_skip_ioresource_align,
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.ident = "IBM System x3850",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
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DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
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},
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},
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{
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.callback = can_skip_ioresource_align,
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.ident = "IBM System x3950",
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.matches = {
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DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
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DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
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},
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},
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{}
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};
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void __init dmi_check_skip_isa_align(void)
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{
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dmi_check_system(can_skip_pciprobe_dmi_table);
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}
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static void pcibios_fixup_device_resources(struct pci_dev *dev)
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{
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struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
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struct resource *bar_r;
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int bar;
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if (pci_probe & PCI_NOASSIGN_BARS) {
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/*
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* If the BIOS did not assign the BAR, zero out the
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* resource so the kernel doesn't attmept to assign
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* it later on in pci_assign_unassigned_resources
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*/
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for (bar = 0; bar <= PCI_STD_RESOURCE_END; bar++) {
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bar_r = &dev->resource[bar];
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if (bar_r->start == 0 && bar_r->end != 0) {
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bar_r->flags = 0;
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bar_r->end = 0;
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}
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}
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}
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if (pci_probe & PCI_NOASSIGN_ROMS) {
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if (rom_r->parent)
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return;
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if (rom_r->start) {
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/* we deal with BIOS assigned ROM later */
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return;
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}
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rom_r->start = rom_r->end = rom_r->flags = 0;
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}
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}
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/*
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* Called after each bus is probed, but before its children
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* are examined.
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*/
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void pcibios_fixup_bus(struct pci_bus *b)
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{
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struct pci_dev *dev;
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pci_read_bridge_bases(b);
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list_for_each_entry(dev, &b->devices, bus_list)
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pcibios_fixup_device_resources(dev);
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}
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void pcibios_add_bus(struct pci_bus *bus)
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{
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acpi_pci_add_bus(bus);
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}
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void pcibios_remove_bus(struct pci_bus *bus)
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{
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acpi_pci_remove_bus(bus);
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}
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/*
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* Only use DMI information to set this if nothing was passed
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* on the kernel command line (which was parsed earlier).
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*/
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static int __init set_bf_sort(const struct dmi_system_id *d)
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{
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if (pci_bf_sort == pci_bf_sort_default) {
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pci_bf_sort = pci_dmi_bf;
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printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
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}
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return 0;
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}
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static void __init read_dmi_type_b1(const struct dmi_header *dm,
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void *private_data)
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{
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u8 *d = (u8 *)dm + 4;
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if (dm->type != 0xB1)
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return;
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switch (((*(u32 *)d) >> 9) & 0x03) {
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case 0x00:
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printk(KERN_INFO "dmi type 0xB1 record - unknown flag\n");
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break;
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case 0x01: /* set pci=bfsort */
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smbios_type_b1_flag = 1;
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break;
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case 0x02: /* do not set pci=bfsort */
|
|
smbios_type_b1_flag = 2;
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
static int __init find_sort_method(const struct dmi_system_id *d)
|
|
{
|
|
dmi_walk(read_dmi_type_b1, NULL);
|
|
|
|
if (smbios_type_b1_flag == 1) {
|
|
set_bf_sort(d);
|
|
return 0;
|
|
}
|
|
return -1;
|
|
}
|
|
|
|
/*
|
|
* Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
|
|
*/
|
|
#ifdef __i386__
|
|
static int __init assign_all_busses(const struct dmi_system_id *d)
|
|
{
|
|
pci_probe |= PCI_ASSIGN_ALL_BUSSES;
|
|
printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
|
|
" (pci=assign-busses)\n", d->ident);
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static int __init set_scan_all(const struct dmi_system_id *d)
|
|
{
|
|
printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
|
|
d->ident);
|
|
pci_add_flags(PCI_SCAN_ALL_PCIE_DEVS);
|
|
return 0;
|
|
}
|
|
|
|
static const struct dmi_system_id pciprobe_dmi_table[] __initconst = {
|
|
#ifdef __i386__
|
|
/*
|
|
* Laptops which need pci=assign-busses to see Cardbus cards
|
|
*/
|
|
{
|
|
.callback = assign_all_busses,
|
|
.ident = "Samsung X20 Laptop",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
|
|
},
|
|
},
|
|
#endif /* __i386__ */
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "Dell PowerEdge 1950",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "Dell PowerEdge 1955",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "Dell PowerEdge 2900",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "Dell PowerEdge 2950",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "Dell PowerEdge R900",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
|
|
},
|
|
},
|
|
{
|
|
.callback = find_sort_method,
|
|
.ident = "Dell System",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL20p G3",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL20p G4",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL30p G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL25p G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL35p G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL45p G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL45p G2",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL460c G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL465c G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL480c G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant BL685c G1",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant DL360",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant DL380",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
|
|
},
|
|
},
|
|
#ifdef __i386__
|
|
{
|
|
.callback = assign_all_busses,
|
|
.ident = "Compaq EVO N800c",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
|
|
},
|
|
},
|
|
#endif
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant DL385 G2",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_bf_sort,
|
|
.ident = "HP ProLiant DL585 G2",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "HP"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_scan_all,
|
|
.ident = "Stratus/NEC ftServer",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "Stratus"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "ftServer"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_scan_all,
|
|
.ident = "Stratus/NEC ftServer",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R32"),
|
|
},
|
|
},
|
|
{
|
|
.callback = set_scan_all,
|
|
.ident = "Stratus/NEC ftServer",
|
|
.matches = {
|
|
DMI_MATCH(DMI_SYS_VENDOR, "NEC"),
|
|
DMI_MATCH(DMI_PRODUCT_NAME, "Express5800/R31"),
|
|
},
|
|
},
|
|
{}
|
|
};
|
|
|
|
void __init dmi_check_pciprobe(void)
|
|
{
|
|
dmi_check_system(pciprobe_dmi_table);
|
|
}
|
|
|
|
void pcibios_scan_root(int busnum)
|
|
{
|
|
struct pci_bus *bus;
|
|
struct pci_sysdata *sd;
|
|
LIST_HEAD(resources);
|
|
|
|
sd = kzalloc(sizeof(*sd), GFP_KERNEL);
|
|
if (!sd) {
|
|
printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busnum);
|
|
return;
|
|
}
|
|
sd->node = x86_pci_root_bus_node(busnum);
|
|
x86_pci_root_bus_resources(busnum, &resources);
|
|
printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
|
|
bus = pci_scan_root_bus(NULL, busnum, &pci_root_ops, sd, &resources);
|
|
if (!bus) {
|
|
pci_free_resource_list(&resources);
|
|
kfree(sd);
|
|
return;
|
|
}
|
|
pci_bus_add_devices(bus);
|
|
}
|
|
|
|
void __init pcibios_set_cache_line_size(void)
|
|
{
|
|
struct cpuinfo_x86 *c = &boot_cpu_data;
|
|
|
|
/*
|
|
* Set PCI cacheline size to that of the CPU if the CPU has reported it.
|
|
* (For older CPUs that don't support cpuid, we se it to 32 bytes
|
|
* It's also good for 386/486s (which actually have 16)
|
|
* as quite a few PCI devices do not support smaller values.
|
|
*/
|
|
if (c->x86_clflush_size > 0) {
|
|
pci_dfl_cache_line_size = c->x86_clflush_size >> 2;
|
|
printk(KERN_DEBUG "PCI: pci_cache_line_size set to %d bytes\n",
|
|
pci_dfl_cache_line_size << 2);
|
|
} else {
|
|
pci_dfl_cache_line_size = 32 >> 2;
|
|
printk(KERN_DEBUG "PCI: Unknown cacheline size. Setting to 32 bytes\n");
|
|
}
|
|
}
|
|
|
|
int __init pcibios_init(void)
|
|
{
|
|
if (!raw_pci_ops) {
|
|
printk(KERN_WARNING "PCI: System does not support PCI\n");
|
|
return 0;
|
|
}
|
|
|
|
pcibios_set_cache_line_size();
|
|
pcibios_resource_survey();
|
|
|
|
if (pci_bf_sort >= pci_force_bf)
|
|
pci_sort_breadthfirst();
|
|
return 0;
|
|
}
|
|
|
|
char *__init pcibios_setup(char *str)
|
|
{
|
|
if (!strcmp(str, "off")) {
|
|
pci_probe = 0;
|
|
return NULL;
|
|
} else if (!strcmp(str, "bfsort")) {
|
|
pci_bf_sort = pci_force_bf;
|
|
return NULL;
|
|
} else if (!strcmp(str, "nobfsort")) {
|
|
pci_bf_sort = pci_force_nobf;
|
|
return NULL;
|
|
}
|
|
#ifdef CONFIG_PCI_BIOS
|
|
else if (!strcmp(str, "bios")) {
|
|
pci_probe = PCI_PROBE_BIOS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "nobios")) {
|
|
pci_probe &= ~PCI_PROBE_BIOS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "biosirq")) {
|
|
pci_probe |= PCI_BIOS_IRQ_SCAN;
|
|
return NULL;
|
|
} else if (!strncmp(str, "pirqaddr=", 9)) {
|
|
pirq_table_addr = simple_strtoul(str+9, NULL, 0);
|
|
return NULL;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_PCI_DIRECT
|
|
else if (!strcmp(str, "conf1")) {
|
|
pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
|
|
return NULL;
|
|
}
|
|
else if (!strcmp(str, "conf2")) {
|
|
pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
|
|
return NULL;
|
|
}
|
|
#endif
|
|
#ifdef CONFIG_PCI_MMCONFIG
|
|
else if (!strcmp(str, "nommconf")) {
|
|
pci_probe &= ~PCI_PROBE_MMCONF;
|
|
return NULL;
|
|
}
|
|
else if (!strcmp(str, "check_enable_amd_mmconf")) {
|
|
pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
|
|
return NULL;
|
|
}
|
|
#endif
|
|
else if (!strcmp(str, "noacpi")) {
|
|
acpi_noirq_set();
|
|
return NULL;
|
|
}
|
|
else if (!strcmp(str, "noearly")) {
|
|
pci_probe |= PCI_PROBE_NOEARLY;
|
|
return NULL;
|
|
}
|
|
else if (!strcmp(str, "usepirqmask")) {
|
|
pci_probe |= PCI_USE_PIRQ_MASK;
|
|
return NULL;
|
|
} else if (!strncmp(str, "irqmask=", 8)) {
|
|
pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
|
|
return NULL;
|
|
} else if (!strncmp(str, "lastbus=", 8)) {
|
|
pcibios_last_bus = simple_strtol(str+8, NULL, 0);
|
|
return NULL;
|
|
} else if (!strcmp(str, "rom")) {
|
|
pci_probe |= PCI_ASSIGN_ROMS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "norom")) {
|
|
pci_probe |= PCI_NOASSIGN_ROMS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "nobar")) {
|
|
pci_probe |= PCI_NOASSIGN_BARS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "assign-busses")) {
|
|
pci_probe |= PCI_ASSIGN_ALL_BUSSES;
|
|
return NULL;
|
|
} else if (!strcmp(str, "use_crs")) {
|
|
pci_probe |= PCI_USE__CRS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "nocrs")) {
|
|
pci_probe |= PCI_ROOT_NO_CRS;
|
|
return NULL;
|
|
} else if (!strcmp(str, "earlydump")) {
|
|
pci_early_dump_regs = 1;
|
|
return NULL;
|
|
} else if (!strcmp(str, "routeirq")) {
|
|
pci_routeirq = 1;
|
|
return NULL;
|
|
} else if (!strcmp(str, "skip_isa_align")) {
|
|
pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
|
|
return NULL;
|
|
} else if (!strcmp(str, "noioapicquirk")) {
|
|
noioapicquirk = 1;
|
|
return NULL;
|
|
} else if (!strcmp(str, "ioapicreroute")) {
|
|
if (noioapicreroute != -1)
|
|
noioapicreroute = 0;
|
|
return NULL;
|
|
} else if (!strcmp(str, "noioapicreroute")) {
|
|
if (noioapicreroute != -1)
|
|
noioapicreroute = 1;
|
|
return NULL;
|
|
}
|
|
return str;
|
|
}
|
|
|
|
unsigned int pcibios_assign_all_busses(void)
|
|
{
|
|
return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
|
|
}
|
|
|
|
#if defined(CONFIG_X86_DEV_DMA_OPS) && defined(CONFIG_PCI_DOMAINS)
|
|
static LIST_HEAD(dma_domain_list);
|
|
static DEFINE_SPINLOCK(dma_domain_list_lock);
|
|
|
|
void add_dma_domain(struct dma_domain *domain)
|
|
{
|
|
spin_lock(&dma_domain_list_lock);
|
|
list_add(&domain->node, &dma_domain_list);
|
|
spin_unlock(&dma_domain_list_lock);
|
|
}
|
|
EXPORT_SYMBOL_GPL(add_dma_domain);
|
|
|
|
void del_dma_domain(struct dma_domain *domain)
|
|
{
|
|
spin_lock(&dma_domain_list_lock);
|
|
list_del(&domain->node);
|
|
spin_unlock(&dma_domain_list_lock);
|
|
}
|
|
EXPORT_SYMBOL_GPL(del_dma_domain);
|
|
|
|
static void set_dma_domain_ops(struct pci_dev *pdev)
|
|
{
|
|
struct dma_domain *domain;
|
|
|
|
spin_lock(&dma_domain_list_lock);
|
|
list_for_each_entry(domain, &dma_domain_list, node) {
|
|
if (pci_domain_nr(pdev->bus) == domain->domain_nr) {
|
|
pdev->dev.archdata.dma_ops = domain->dma_ops;
|
|
break;
|
|
}
|
|
}
|
|
spin_unlock(&dma_domain_list_lock);
|
|
}
|
|
#else
|
|
static void set_dma_domain_ops(struct pci_dev *pdev) {}
|
|
#endif
|
|
|
|
int pcibios_add_device(struct pci_dev *dev)
|
|
{
|
|
struct setup_data *data;
|
|
struct pci_setup_rom *rom;
|
|
u64 pa_data;
|
|
|
|
pa_data = boot_params.hdr.setup_data;
|
|
while (pa_data) {
|
|
data = ioremap(pa_data, sizeof(*rom));
|
|
if (!data)
|
|
return -ENOMEM;
|
|
|
|
if (data->type == SETUP_PCI) {
|
|
rom = (struct pci_setup_rom *)data;
|
|
|
|
if ((pci_domain_nr(dev->bus) == rom->segment) &&
|
|
(dev->bus->number == rom->bus) &&
|
|
(PCI_SLOT(dev->devfn) == rom->device) &&
|
|
(PCI_FUNC(dev->devfn) == rom->function) &&
|
|
(dev->vendor == rom->vendor) &&
|
|
(dev->device == rom->devid)) {
|
|
dev->rom = pa_data +
|
|
offsetof(struct pci_setup_rom, romdata);
|
|
dev->romlen = rom->pcilen;
|
|
}
|
|
}
|
|
pa_data = data->next;
|
|
iounmap(data);
|
|
}
|
|
set_dma_domain_ops(dev);
|
|
return 0;
|
|
}
|
|
|
|
int pcibios_enable_device(struct pci_dev *dev, int mask)
|
|
{
|
|
int err;
|
|
|
|
if ((err = pci_enable_resources(dev, mask)) < 0)
|
|
return err;
|
|
|
|
if (!pci_dev_msi_enabled(dev))
|
|
return pcibios_enable_irq(dev);
|
|
return 0;
|
|
}
|
|
|
|
void pcibios_disable_device (struct pci_dev *dev)
|
|
{
|
|
if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
|
|
pcibios_disable_irq(dev);
|
|
}
|
|
|
|
int pci_ext_cfg_avail(void)
|
|
{
|
|
if (raw_pci_ext_ops)
|
|
return 1;
|
|
else
|
|
return 0;
|
|
}
|