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c3fb04162a
Patch from Dimitry Andric In arch/arm/mach-s3c2410/sleep.S, the coprocessor registers are saved at suspend time, and restored at resume time. However, an undefined instruction is used when attempting to restore a non-existent "auxiliary control register". This leads to a crash on S3C2412, which has an ARM926 core instead of an ARM920. At suspend time, the following fragment runs: mrc p15, 0, r7, c2, c0, 0 @ translation table base address mrc p15, 0, r8, c2, c0, 0 @ auxiliary control register mrc p15, 0, r9, c1, c0, 0 @ control register and at resume time, the following fragment runs: mcr p15, 0, r7, c2, c0, 0 @ translation table base mcr p15, 0, r8, c1, c1, 0 @ auxilliary control ... mcr p15, 0, r9, c1, c0, 0 @ turn on MMU, etc There are several problems with these fragments: 1. The ARM920 and ARM926 cores don't have any "auxiliary control register", at least not according to the ARM920 and ARM926 TRM's. 2. The 2nd line of suspend erroneously saves the c2 register again. 3. This saved c2 value is restored using an undefined instruction. For some reason this does not crash on ARM920, but does crash on ARM926. The following patch fixes all these problems. Signed-off-by: Dimitry Andric <dimitry@andric.com> Yes, this looks sensible Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> |
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