Daniel Borkmann c3d4c682c2 bpf, arm64: start flushing icache range from header ... While recently going over ARM64's BPF code, I noticed that the icache range we're flushing should start at header already and not at ctx.image. Reason is that after b569c1c622 ("net: bpf: arm64: address randomize and write protect JIT code"), we also want to make sure to flush the random-sized trap in front of the start of the actual program (analogous to x86). No operational differences from user side. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net> Acked-by: Zi Shen Lim <zlim.lnx@gmail.com> Cc: Alexei Starovoitov <ast@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>		2015-11-16 14:41:30 -05:00
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boot	ARM: DT updates for v4.4	2015-11-10 15:06:26 -08:00
configs	ARM: SoC defconfig updates for v4.4	2015-11-10 15:08:32 -08:00
crypto	crypto: aead - Remove CRYPTO_ALG_AEAD_NEW flag	2015-08-17 16:53:53 +08:00
include	s390: A bunch of fixes and optimizations for interrupt and time	2015-11-05 16:26:26 -08:00
kernel	ARM: SoC driver updates for v4.4	2015-11-10 15:00:03 -08:00
kvm	s390: A bunch of fixes and optimizations for interrupt and time	2015-11-05 16:26:26 -08:00
lib	arm64: add KASAN support	2015-10-12 17:46:36 +01:00
mm	arm64: fixup for mm renames	2015-11-07 16:45:51 -08:00
net	bpf, arm64: start flushing icache range from header	2015-11-16 14:41:30 -05:00
xen	arm: xen: implement multicall hypercall support.	2014-04-24 13:09:46 +01:00
Kconfig	IOMMU Updates for Linux v4.4	2015-11-05 16:12:10 -08:00
Kconfig.debug	arm64: Clean config usages for page size	2015-10-19 17:53:57 +01:00
Kconfig.platforms	ARM: DT updates for v4.4	2015-11-10 15:06:26 -08:00
Makefile	arm64 updates for 4.4:	2015-11-04 14:47:13 -08:00