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mirror of https://github.com/edk2-porting/linux-next.git synced 2024-12-25 21:54:06 +08:00
linux-next/include/soc
Holger Brunck 067bb938da net/wan/fsl_ucc_hdlc: add hdlc-bus support
This adds support for hdlc-bus mode to the fsl_ucc_hdlc driver. This can
be enabled with the "fsl,hdlc-bus" property in the DTS node of the
corresponding ucc.

This aligns the configuration of the UPSMR and GUMR registers to what is
done in our ucc_hdlc driver (that only support hdlc-bus mode) and with
the QuickEngine's documentation for hdlc-bus mode.

GUMR/SYNL is set to AUTO for the busmode as in this case the CD signal
is ignored. The brkpt_support is enabled to set the HBM1 bit in the
CMXUCR register to configure an open-drain connected HDLC bus.

Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
Cc: Zhao Qiang <qiang.zhao@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-05-18 10:28:39 -04:00
..
arc ARCv2: IDU-intc: Use build registers for getting numbers of interrupts 2017-02-06 09:37:57 -08:00
at91 ARM: at91: define LPDDR types 2017-01-16 23:21:29 +01:00
bcm2835 staging: vc04_services: fix up rpi firmware functions 2016-10-16 10:26:12 +02:00
brcmstb soc: add stubs for brcmstb SoC's 2015-09-14 15:44:18 -07:00
fsl net/wan/fsl_ucc_hdlc: add hdlc-bus support 2017-05-18 10:28:39 -04:00
imx ARM: imx6: fix static declaration in include/soc/imx/cpuidle.h 2016-06-21 14:35:29 +08:00
mediatek memory: mediatek: Add SMI driver 2016-02-25 16:49:08 +01:00
nps soc: Support for NPS HW scheduling 2016-11-30 11:54:25 -08:00
rockchip soc: rockchip: add header for ddr rate SIP interface 2016-08-31 18:53:24 +02:00
sa1100 ARM: 8361/1: sa1100: add platform functions to handle PWER settings 2015-05-18 22:00:22 +01:00
tegra soc/tegra: Move Tegra flowctrl driver 2017-04-04 15:48:04 +02:00