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4781c22c76
The NAND DQS pins are currently named nand_dqs_0 and nand_dqs_1. However, they both seem to have the same function, just exposed on different pins (unlike the ethernet TX pins for example, where there's eth_txd0..3 - all of these can be active at the same time as they are different data lines). Rename the NAND DQS pins to nand_dqs_15 and nand_dqs_18 to reflect that it's the same functionality just exposed on different pins (BOOT_15 and BOOT_18). Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Acked-by: Kevin Hilman <khilman@baylibre.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> |
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.. | ||
Makefile | ||
pinctrl-meson8.c | ||
pinctrl-meson8b.c | ||
pinctrl-meson-gxbb.c | ||
pinctrl-meson-gxl.c | ||
pinctrl-meson.c | ||
pinctrl-meson.h |