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c2df436bd2
* One new edac driver for Intel E3-12xx DRAM controllers.
Out-of-subsystem changes are making the non-atomic iomem 64-bit
accessors' naming explicit to show both exact order of the 32-bit
accesses and the non-atomicity of the 64-bit access.
Usage locations are more verbose now as to what access is exactly being
done vs having a not-very telling "readq" there, for example.
This is needed by E3-12xx hardware where certain mmapped registers
cannot be accessed with requests crossing a dword boundary.
From Jason Baron.
* Extending AMD MCE signatures to a new model 60h in family 15h, from
Aravind Gopalakrishnan.
* An unsigned check cleanup, from Fabian Frederick.
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Merge tag 'edac_for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp
Pull EDAC changes from Borislav Petkov:
"EDAC queue for 3.17:
- One new edac driver for Intel E3-12xx DRAM controllers.
- Out-of-subsystem changes are making the non-atomic iomem 64-bit
accessors' naming explicit to show both exact order of the 32-bit
accesses and the non-atomicity of the 64-bit access.
Usage locations are more verbose now as to what access is exactly
being done vs having a not-very telling "readq" there, for example.
This is needed by E3-12xx hardware where certain mmapped registers
cannot be accessed with requests crossing a dword boundary.
From Jason Baron.
- Extending AMD MCE signatures to a new model 60h in family 15h, from
Aravind Gopalakrishnan.
- An unsigned check cleanup, from Fabian Frederick"
* tag 'edac_for_3.17' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp:
EDAC, MCE, AMD: Add MCE decoding for F15h M60h
MAINTAINERS: add ie31200_edac entry
ie31200_edac: Allocate mci and map mchbar first
ie31200_edac: Introduce the driver
x38_edac: make use of lo_hi_readq()
readq/writeq: Add explicit lo_hi_[read|write]_q and hi_lo_[read|write]_q
EDAC, edac_module.c: Remove unnecessary test on unsigned value
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